Multi-layer wiring board, method for producing multi-layer wiring board, polishing machine for multi-layer wiring board, and metal sheet for producing wiring board

ABSTRACT

A plurality of multi-layer metal plates ( 1 ) each being composed of a bump forming metal layer ( 2 ), an etching stop layer ( 3 ), and a wiring film forming metal layer ( 4 ), and in which a wiring film ( 4   a ) is formed from the wiring film forming metal layer and a bump  2   a  is formed from the bump forming metal layer are prepared, and on a bump forming surface of a multi-layer metal plate, a wiring film of another multi-layer metal plate is overlapped. Such lamination process is repeated in succession for multi-layering. In addition, a polishing machine for multi-layer wiring board ( 11   a ) which includes metal plate holding means ( 13 ) for holding a metal plate ( 1   a ), cutter holding means ( 25 ) for holding a cutter ( 26 ) above the metal plate, height adjustment mechanism ( 20 ) for adjusting the height of the cutter holding means, and cutter parallel moving mechanism ( 15 ) for relatively moving the cutter holding means in parallel to the surface of the metal plate is used to conduct polishing.

TECHNICAL FIELD

The present invention relates to a method of manufacturing a multi-layerwiring board and a metal plate for forming the multi-layer wiring board,and more particularly to a multi-layer wiring board manufacturing methodof manufacturing a high integration, high reliability wiring boardhaving a microvia to a metal plate for forming a high integration, highreliability wiring board having a microvia.

BACKGROUND ART

When high integration is to be obtained for a wiring board, it isrequired that the wiring board is multi-layered and connections betweenupper and lower wiring films are minutely formed with high reliability.The present invention responds to such requirement.

By the way, conventionally, there is a technique in which with respectto a multi-layer wiring board, for example, a wiring board in whichwiring films are formed on both surfaces or in a multi-layer structureis used as a base (hereinafter referred to as “a core board” in somecases), an upper and lower wirings interconnecting hole is formed in thewiring board as the base by, for example, a drill or the like, a platingfilm is formed on the inner peripheral surface of the upper and lowerwirings interconnecting hole to use the plating film as an upper andlower wirings interconnecting wiring film, a silver paste or aninsulating paste is embedded in the upper and lower wiringsinterconnecting hole if necessary, copper foil having another interlayerconnection bump on which an insulating resin is laminated, or copperfoil coated with a resin is laminated on both surfaces of the wiringboard as the base, it is drilled by using laser light, and a via isformed by a plating method. This is called a buildup method and is amulti-layer wiring board manufacturing method that was used as a methodof increasing the integration of a board.

By the way, according to the above conventional high-density multi-layerwiring board manufacturing method, there is a problem that highintegration is difficult to achieve. This is because it is difficult toreduce a size of the above upper and lower wirings interconnecting hole.When mass production and a yield are considered, it is difficult inpractice to set the hole size to 0.3 mm or less in the core board andhigh integration is limited by the existence of the upper and lowerwirings interconnecting hole having a relatively large hole size.

In other words, the upper and lower wirings interconnecting hole itselfoccupies a portion of the core board. Thus, when the hole size is large,this is a factor for directly limiting the integration of the wiringboard. Further, the upper and lower wirings interconnecting holeconstitutes a factor for forcing other wiring films to make a detour.Therefore, when the hole size is increased, this becomes a factor forincreasing the number of wiring films that are forced to make a detourand also increasing the detour length of the detouring wiring film, andindirectly limits the integration of the wiring board.

Also, there were developed: a wiring board in which one main surface ofa wiring board forming metal plate in which a plurality of metal bumpseach having a longitudinal cross sectional shape such as a cone shape ora trapezoid shape are-arranged in predetermined positions on the onemain surface and which is made of metal foil is covered with at least aninsulating sheet which is made of a synthetic resin and composed of aninterlayer insulating film having a thickness smaller than the height ofthe metal bumps, so as to follow the shapes of the above respectivemetal bumps, and one main surface of the metal plate is polished so thata portion of the above insulating sheet which covers the metal bumps isremoved to expose upper surfaces of the metal bumps; and the laminationmanufacturing technique therefore, and the developed technique wasproposed in JP 2000-334332 A. According to this, an insulating sheet(insulating layer) as an insulating layer of a wiring layer which ismade of, for example, an epoxy resin, a polyimide resin, a polyesterresin, a bismaleimide triazine resin, a polyphenylene ether resin, aliquid crystal polymer, or the like, and a peeling sheet (first peelingsheet) and a paper (second peeling sheet) which are made of a syntheticresin or metal foil are prepared, and are laminated on a bump formationside main surface of the above metal plate by a plate vacuum thermalpress (thermal press). Thus, it is recognized that a polishing methodallowing excellent mass production property and a polishing machine usedfor the polishing are required, and thus the polishing method and thepolishing machine has been devised as the embodiments of the presentinvention. In other words, in a method of manufacturing a wiring boardin which one main surface of a metal plate in which a plurality of metalbumps each having a longitudinal cross sectional shape such as a coneshape or a trapezoid shape are arranged in predetermined positions onthe one main surface and which is made of metal foil is covered with aninsulating sheet which is made of at least a synthetic resin andconstitutes an interlayer insulating film having a thickness smallerthan the height of the metal bumps, so as to follow the shapes of theabove respective metal bumps, and one main surface of the metal plate ispolished so that a portion of the above insulating sheet which coversthe metal bumps is removed to expose upper surfaces of the metal bumps,improved mass production property of the polishing and a new wiringboard polishing machine which is used for the polishing and capable ofimproving the mass production property of polishing are sought by thepresent invention.

Further, according to the metal plate, copper is used for a rowmaterial. Thus, electrical connections are provided through portionsbetween the formed bumps and wiring films connected therewith bypressure welding of copper and a copper layer. However, with onlypressure welding, electrical connection is not provided from thebeginning, or even if the electrical connection is provided, by anaccelerating test in which long-term usage is assumed, there is observeda phenomenon such that a pressure welding surface is deteriorated, or insome extreme cases, the electrical connection is lost.

The deterioration of the pressure-welding portion is related to thehardness of the bump. Specifically, copper oxide or other such coatingfilm progresses due to a phenomenon in which a resin composing aninsulating layer and other foreign matters such as, moisture, hydrogen,and the like gradually penetrate into the pressure welding portion, orthe progress of oxidation on a pressure welding surface between the bumpand the copper layer or the wiring film, so that a problem is cased inthat an electrical resistance value between the bump and the copperlayer or the wiring film is increased, thus reducing the long-termconnection reliability. Basically, copper is very easy to oxidize and isa metal in which copper oxide is formed on its surface by the oxidation.Thus, when copper is used for electrical parts, for the stability of thesurface, it is common to impart specific hardness to the surface or toperform predetermined processing in advance.

Therefore, an object of the present invention is to reduce an electricalresistance value between the bump provided on the copper layer and thewiring film made of copper foil or copper which is connected therewith,to thereby provide good electrical connection and also enhancedstability.

DISCLOSURE OF THE INVENTION

According to a manufacturing method of the present invention, in orderto provide an electrical connection between upper and lower wirings, abump formed by patterning a bump forming metal layer of a multi-layermetal board is used as upper and lower wirings interconnecting means sothat a conventional hole formation is unnecessary. Thus, as comparedwith a conventional case, the region of a portion required forinterconnecting upper and lower wirings can be extremely narrowed suchthat a diameter thereof is for example 0.1 mm or less.

According to another manufacturing method of the present invention, alamination process is repeated in succession for multi-layering in amanner such that, on a bump forming surface of a multi-layer metalplate, a wiring film forming surface of another multi-layer metal plateis overlapped. Thus, the number of layers of the multi-layer metal boardcan be arbitrarily increased according to the number of repetition ofthe process and a wiring board with very high integration can beprovided.

According to further another manufacturing method of the presentinvention, in addition to the multi-layer wiring board manufacturingmethod in the preceding paragraph, the uppermost wiring film formingmetal layer and the lowermost wiring film forming metal thin layer aresimultaneously patterned. Thus, the number of wiring films can befurther increased and an effect is also obtained in that the number oflayers of the wiring board can be further increased.

According to further another manufacturing method of the presentinvention, in order to connect between upper and lower wirings, bumpsformed by patterning a bump forming metal layer of a multi-metal layerboard is used as upper and lower wirings interconnecting means so that aconventional hole formation is unnecessary. Thus, as compared with aconventional case, the region of a portion required for interconnectingupper and lower wirings can be extremely narrowed such that a diameterthereof is for example 0.1 mm or less.

According to further another manufacturing method of the presentinvention, a region of a portion required for interconnecting upper andlower wirings can be extremely narrowed such that a diameter thereof canbe for example 0.1 mm or less. Thus, not only a direct effect isobtained with respect to the improvement of integration due to thenarrowing of an area which an upper and lower wirings interconnectingportico itself occupies, but also the number of wiring films which areforced to make a detour can be reduced due to an indirect effect thatadverse influence on other wiring films such that they are forced tomake a detour is reduced. Further, another effect is obtained in thatthe detour length of the wiring films that are forced to make a detourcan be also shortened.

According to further another manufacturing method of the presentinvention, a bump forming metal layer on which a wiring film formingmetal layer is laminated through an etching stop layer is used as a baseof a multi-metal layer, and the wiring film forming metal layer ispatterned. Thus, a wiring film can be formed.

According to further another manufacturing method of the presentinvention, a bump forming metal layer on which an etching stop layer islaminated is used as a base of a multi-layer metal plate, and metal isselectively plated on an anti-bump forming metal layer side surface ofthe etching stop layer. Thus, a wiring film made from a plating film canbe formed.

Then, since the wiring film is formed by plating, side etching thatwould be caused in the case where the wiring film forming metal layer ispatterned by photo etching is not caused. Thus, minute wiring films canbe formed at high integration.

According to further another manufacturing method of the presentinvention, a plural kinds of basic wiring boards with a multi-layerwiring structure are prepared and a plurality of basic wiring boardsincluding different kinds of boards from among the plural kinds of basicwiring boards are laminated. As a result, a multi-layer wiring boardwith multi-layers, for example, 4 layers to 10 or more layers can beeasily obtained.

According to further another manufacturing method of the presentinvention, after the plurality of basic wiring boards are laminated,wiring film forming metal layers as the uppermost layer and thelowermost layer are patterned. Thus, wiring films on the uppermost layerand the lowermost layer can be simultaneously formed, so that the numberof wiring film forming steps can be reduced by one, and the cost of themulti-layer wiring board can be reduced.

According to further another manufacturing method of the presentinvention, a multi-layer metal plate, each layer of which is thin andits mechanical strength is low, is reinforced with a reinforcing layer.Thus, workability is improved and a fraction defective can be reduced.In addition, the surface of a wiring film forming metal layer iscontinuously protected by the reinforcing layer during a period from thefirst step to the wiring film patterning step. Thus, damage or the liketo the surface in for example a press step is prevented and a defect isnot caused in a formed wiring film. Further, the surface of the wiringfilm forming metal layer is protected from a chemical solution anddeposition of contaminants on the surface is prevented.

According to further another manufacturing method of the presentinvention, the same effect as the multi-layer wiring board manufacturingmethod in the preceding paragraph or the paragraph prior to thepreceding paragraph can be obtained. In addition, when a reinforcinglayer is made of metal such as nickel or copper, etching is required forpeeling it so that the number of steps is increased. However, in thecase where the reinforcing layer is composed of a peeling layer and aheat resistant film as in this multi-layer wiring board manufacturingmethod, when a wiring film patterning step is to be conducted, it issufficient that the heat resistant film is merely peeled off so that theprocess is simplified as a result.

According to a wiring board forming metal plate of the presentinvention, a multi-layer metal plate, each layer of which is thin andits mechanical strength is low, is reinforced with a reinforcing layer.Thus, workability is improved and a fraction defective can be reduced.In addition, the surface of a wiring film forming metal layer iscontinuously protected by a heat resistant film during a period of fromthe first step to the wiring film patterning step. Thus, damage or thelike to the surface in, for example, a press step is prevented and adefect is not caused in a formed wiring film. Further, the surface ofthe wiring film forming metal layer is protected from a chemicalsolution and deposition of contaminants on the surface is prevented.Furthermore, when the reinforcing layer is made of metal such as nickelor copper, etching is required for peeling it so that the number ofsteps is increased. However, in the case where the metal plate forwiring board formation is composed of a peeling layer and a heatresistant film, when a wiring film patterning step is to be conducted,it is sufficient that the heat resistant film is merely peeled off sothat the process is simplified as a result.

According to further another multi-layer board manufacturing method ofthe present invention, in a method of manufacturing a multi-layer wiringboard, in which on one main surface of a metal board for forming awiring board, a plurality of metal bumps having a longitudinal crosssectional shape such as a cone shape or a trapezoid shape are arrangedin predetermined positions, covered with at least an insulating sheetwhich is made of a synthetic resin and composed of an interlayerinsulating film having a thickness smaller than the height of the bumps,so as to follow the shapes of the above respective metal bumps, and theone main surface of the above metal plate is polished so that a portionof the above insulating sheet which covers the bumps is removed toexpose upper surfaces of the bumps, the polishing is conducted asfollows, the above metal plate is placed such that the one main surfacefaces upward, a cutter having a large width is moved relatively to theabove metal plate in parallel to the main surface and the top surfacesof the respective bumps are cut by the cutter such that they lie on thesame plane as the surface of the insulating sheet.

According to another multi-layer board manufacturing method of thepresent invention, the cutter having a large width in the precedingparagraph is moved in a direction parallel to the metal plate whileapplying low frequency vibration or ultrasonic vibration in a directionperpendicular to the main surface.

According to further another multi-layer board manufacturing method ofthe present invention, the invention includes at least metal plateholding means for holding the metal plate with a state in which the onemain surface faces upward, cutter holding means for holding a cutterabove the metal plate, height adjustment mechanism for adjusting theheight of the cutter holding means relative to the metal plate, andcutter parallel moving mechanism for relatively moving the cutterholding means in parallel to the surface of the metal plate.

According to further another manufacturing method of the presentinvention, in the multi-layer board manufacturing method in theparagraph prior to the preceding paragraph, the invention ischaracterized in that polishing which is conducted by passing a metalplate between a polishing roller or a buff roller and a backup roller isconducted plural times such that the degree of finish is graduallyincreased.

According to further another multi-layer wiring board manufacturingmethod of the present invention, the polishing is conducted in such amanner that a cutter roller, in which cutters each having a large widthare provided on its peripheral surface such that cutting edges thereofprotrude toward the rotation direction side, is rotated, and then thetop surfaces of the respective bumps are cut by the cutters of therotated cutter roller such that they lie on the same plane as thesurface of the insulating sheet.

According to a multi-layer wiring board manufacturing method of thepresent invention, a polishing machine of the invention is characterizedby including at least a polishing roller or a buff roller in which apolishing material is sintered on its peripheral surface, rollerrotating means for rotating the polishing roller or the buff roller, abackup roller, pressing means for pressing the backup roller to thepolishing roller or the buff roller, and carrying means for carrying ametal plate between the polishing roller or the buff roller and thebackup roller.

According to a multi-layer wiring board manufacturing method of thepresent invention, a polishing machine of the invention has a pluralityof metal plate polishing portions each including at least: a polishingroller or a buff roller in which a polishing material is sintered on itsperipheral surface; roller rotating means for rotating the polishingroller or the buff roller; a backup roller; pressing means for pressingthe backup roller to the polishing roller or the buff roller; andcarrying means for carrying a metal plate between the polishing rolleror the buff roller and the backup roller. The roughnesses of thepolishing materials of the polishing rollers or the roughnesses of thesurfaces of the buff rollers in the above respective metal platepolishing portions are made different from each other.

According to further another multi-layer wiring board manufacturingmethod of the present invention, a polishing machine of the invention ischaracterized by including at least metal plate holding means forholding the metal plate with a state in which the one main surface facesupward, cutter roller holding means for rotatably holding a cutterroller over the metal plate, rotation drive means for rotating thecutter roller, height adjustment mechanism for adjusting the height ofthe cutter roller holding means relative to the metal plate, and cutterroller parallel moving mechanism for relatively moving the cutter rollerholding means in parallel to the surface of the metal plate.

According to further another multi-layer wiring board manufacturingmethod of the present invention, Vickers hardnesses of a bump made ofmetal (copper) and a metal layer (copper layer) which is laminatedthereon and connected therewith is set to 80 to 150 Hv.

According to further another multi-layer wiring board manufacturingmethod of the present invention, before lamination, blackening reductionprocessing is performed for one or both of a top surface of a bump of ametal member and a surface of a metal layer (copper layer) to belaminated on the metal member or a surface of a metal layer (copperlayer) which becomes a wiring film or a wiring film of another wiringcircuit forming board.

According to further another multi-layer wiring board manufacturingmethod of the present invention, when, on a wiring forming board inwhich upper and lower wirings interconnecting bumps made of metal areintegrally formed on a metal (copper) layer, an interlayer insulatinglayer is to be formed in a portion of the metal (copper) layer in whichthe bumps are not formed, bump holes engaging with the respective bumpsare provided in a portion corresponding to the upper and lower wiringsinterconnecting bumps. Then, the interlayer insulating film isoverlapped on the metal (copper) layer in a state in which therespective bump holes are engaged with the corresponding respectiveupper and lower wirings interconnecting bumps. Further, a wiring formingmetal (copper) layer is pressurized onto the interlayer insulating film.

According to further another multi-layer wiring board manufacturingmethod of the present invention, in the multi-layer wiring boardmanufacturing method in the preceding paragraph, the formation of theabove respective bump holes in the above interlayer insulating film isperformed as follows. The interlayer insulating layer is made to abutwith a bump forming surface of a wiring circuit forming board in whichupper and lower wirings interconnecting bumps are formed so that theinterlayer insulating layer is penetrated by the upper and lower wiringsinterconnecting bumps.

According to further another multi-layer wiring board manufacturingmethod of the present invention, in the multi-layer wiring boardmanufacturing method in the paragraph prior to the preceding paragraph,the formation of the above respective bump holes in the above interlayerinsulating film is performed as follows. The interlayer insulating layeris selectively penetrated by laser light irradiation using as a mask amask body having substantially the same pattern as the upper and lowerwirings interconnecting bumps of the wiring forming board.

According to a multi-layer metal plate for a multi-layer wiring boardmanufacturing method of the present invention, on an interlayerinsulating layer and upper surfaces of bumps of a board in which theupper and lower wirings interconnecting bumps made of metal areintegrally formed on a metal (copper) layer and the interlayerinsulating layer is formed in a portion in which the bumps are notformed on the metal (copper) layer, a multi-layer metal plate in whichextension bumps are formed in positions corresponding to the respectiveupper and lower wirings interconnecting bumps is laminated such that therespective bumps are electrically connected with the respective upperand lower wirings interconnecting bumps corresponding thereto, and aninterlayer insulating layer is formed in a portion of the metal plate inwhich the extension bumps are not formed.

According to a multi-layer wiring board manufacturing method of thepresent invention, the method includes: a step of laminating a metalplate on an interlayer insulating layer and upper surfaces of upper andlower wirings interconnecting bumps of a board in which the upper andlower wirings interconnecting bumps made of metal (copper) areintegrally formed on a metal (copper) layer and the interlayerinsulating layer is formed in a portion in which the bumps are notformed on the metal (copper) layer; a step of selectively etching themetal plate to form extension bumps connected with the respective upperand lower wirings interconnecting bumps in positions correspondingthereto; and a step of forming an interlayer insulating layer in aportion of the metal plate in which the extension bumps are not formed.

According to a multi-layer wiring circuit forming board of the presentinvention, in a manufacturing method for a multi-layer wiring circuitforming board in which a metal (copper) layer or another wiring circuitforming board is laminated on an interlayer insulating layer and uppersurfaces of bumps of a wiring circuit forming board in which the upperand lower wirings interconnecting bumps made of metal (copper) areintegrally formed on a metal (copper) layer and the interlayerinsulating layer is formed in a portion in which the bumps are notformed on the metal (copper) layer, the wiring circuit forming board inwhich the upper and lower wirings interconnecting bumps made of metal(copper) are integrally formed on the metal (copper) layer and theinterlayer insulating layer is formed by laminating an insulating sheetcomposing the interlayer insulating layer on a surface of the metal(copper) layer on which the upper and lower wirings interconnectingbumps are formed is polished by being passed between the polishingroller and the backup roller before the metal (copper) layer or anotherwiring circuit forming board is laminated.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1(A) to 1(D) are sectional views showing in order steps shown inFIGS. 1(A) to 1(D), of steps shown in FIGS. 1(A) to 3(K) in a firstembodiment mode of a multi-layer wiring board manufacturing methodaccording to the present invention.

FIGS. 2(E) to 2(H) are sectional views showing in order steps shown inFIGS. 2(E) to 2(H), of the steps shown in FIGS. 1(A) to 3(K) in thefirst embodiment mode of the multi-layer wiring board manufacturingmethod according to the present invention.

FIGS. 3(I) to 3(K) are sectional views showing in order steps shown inFIGS. 3(I) to 3(K), of the steps shown in FIGS. 1(A) to 3(K) in thefirst embodiment mode of the multi-layer wiring board manufacturingmethod according to the present invention.

FIGS. 4(A) to 4(D) are sectional views showing in step order of a methodof manufacturing an example of a basic wiring board used for a secondembodiment mode of a multi-layer wiring board manufacturing methodaccording to the present invention.

FIG. 5 is a sectional view showing another example of a basic wiringboard used for the second embodiment mode of the multi-layer wiringboard manufacturing method according to the present invention.

FIG. 6 is a sectional view showing further another example of a basicwiring board used for the second embodiment mode of the multi-layerwiring board manufacturing method according to the present invention.

FIG. 7 is a sectional view showing further another example of a basicwiring board used for the second embodiment mode of the multi-layerwiring board manufacturing method according to the present invention.

FIGS. 8(A) and 8(B) are explanatory views of an example of a multi-layerwiring board with 4 layers, in which FIG. 8(A) shows 2 basic wiringboards composing the multi-layer wiring board and FIG. 8(B) shows astate in which the 2 basic wiring boards are laminated.

FIGS. 9(A) and 9(B) are explanatory views of an example of a multi-layerwiring board with 6 layers, in which FIG. 9(A) shows 3 basic wiringboards composing the multi-layer wiring board and FIG. 9(B) shows astate in which the 3 basic wiring boards are laminated.

FIGS. 10(A) and 10(B) are explanatory views of an example of amulti-layer wiring board with 8 layers, in which FIG. 10(A) shows 4basic wiring boards composing the multi-layer wiring board and FIG.10(B) shows a state in which the 4 basic wiring boards are laminated.

FIGS. 11(A) and 11(B) are explanatory views of an example of amulti-layer wiring board with 10 layers, in which FIG. 11(A) shows 5basic wiring boards composing the multi-layer wiring board and FIG.11(B) shows a state in which the 5 basic wiring boards are laminated.

FIGS. 12(A) to 12(E) are sectional views showing in order steps shown inFIGS. 12(A) to 12(E), of steps shown in FIGS. 12(A) to 13(I) in a thirdembodiment mode of a multi-layer wiring board manufacturing methodaccording to the present invention.

FIGS. 13(F) to 13(I) are sectional views showing in order steps shown inFIGS. 13(F) to 13(I), of steps shown in FIGS. 12(A) to 13(I) in thethird embodiment mode of the multi-layer wiring board manufacturingmethod according to the present invention.

FIGS. 14(A) and 14(B) are sectional views showing in order steps shownin FIGS. 14(A) and 14(B) in a modified example of the above thirdembodiment mode.

FIGS. 15(A) to 15(E) are sectional views showing in order steps shown inFIGS. 15(A) to 15(E) in a fourth embodiment mode of a multi-layer wiringboard manufacturing method according to the present invention.

FIGS. 16(A) to 16(E) are sectional views showing in order steps shown inFIGS. 16(A) to 16(E) in a fifth embodiment mode of a multi-layer wiringboard manufacturing method according to the present invention.

FIG. 17 is a side view of a metal plate polishing machine for use of asixth embodiment mode of a multi-layer wiring board manufacturing methodaccording to the present invention.

FIG. 18 is a side view of a metal plate polishing machine for use of aseventh embodiment mode of a multi-layer wiring board manufacturingmethod according to the present invention.

FIGS. 19(A) and 19(B) is a side view of a metal plate polishing machinefor use of an eighth embodiment mode of a multi-layer wiring boardmanufacturing method according to the present invention, in which FIG.19(A) is a perspective view and FIG. 19(B) is a side view showing astate in which a main surface of a metal plate is polished by a cutterroller.

FIGS. 20(A) to 20(D) are explanatory views of a ninth embodiment mode ofa multi-layer wiring board manufacturing method according to the presentinvention, in which FIG. 20(A) is a sectional view of a metal (copper)plate 1 a containing mainly metal (copper), FIG. 20(B) is a sectionalview of a processed metal (copper) plate 1 a and a metal layer (copperlayer) 202 bonded thereto, FIG. 20(C) is a sectional view showing astate in which the metal layer 202 is welded with pressure to bumps, andFIG. 20(D) is a table indicating a reason why Vickers hardness of ametal (copper) portion of a multi-layer wiring circuit board formingmember is set to 80 to 150 Hv.

FIGS. 21(A) to 21(E) show a tenth embodiment mode of a multi-layerwiring board manufacturing method according to the present invention, inwhich FIGS. 21(A) to 21(D) are sectional views showing the manufacturingmethod in step order, and FIG. 21(E) shows by way of a table the statesof a bump forming member side and a metal (copper) layer laminatedthereon as to whether they are good or poor, with regard to variousprocessing contents.

FIGS. 22(A) to 22(C) are sectional views showing in step order aneleventh embodiment mode of a multi-layer wiring board manufacturingmethod according to the present invention.

FIGS. 23(1) to 23(7) are sectional views showing in step order a twelfthembodiment mode of a multi-layer wiring board manufacturing methodaccording to the present invention and

FIGS. 23(11) to 23(15) are sectional views showing in step order amodified example of the embodiment mode.

FIGS. 24(1) to 24(5) are sectional views showing in step order athirteenth embodiment mode of a multi-layer wiring board manufacturingmethod according to the present invention.

FIG. 25 is a sectional view showing a fourteenth embodiment mode of amulti-layer wiring board manufacturing method according to the presentinvention.

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, the present invention will be described in detail accordingto embodiment modes thereof.

FIGS. 1(A) to 1(D), FIGS. 2(E) to 2(H), and FIGS. 3(I) to 3(K) aresectional views showing steps of FIGS. 1(A) to 3(K) in order in a firstembodiment mode of a multi-layer wiring board manufacturing methodaccording to the present invention.

(A) First, as shown in FIG. 1(A), multi-layer metal plates 1 a and 1 bare prepared. Note that the multi-layer metal plate 1 a corresponds to afirst multi-layer metal plate in claim 1 and the multi-layer metal plate1 b corresponds to a second multi-layer metal plate of claim 1.

The above multi-layer metal plates 1 a and 1 b each are obtained bylaminating a wiring film forming metal layer 4 made of copper foilhaving a thickness of for example 18 μm on one main surface of a bumpforming metal layer 2 made of copper foil having a thickness of forexample 100 μm, through an etching stop layer 3 made of a nickel layerhaving a thickness of for example 2 μm.

(B) Next, with respect to the above multi-layer metal plate 1 a, thebump forming metal layer 2 and the etching stop layer 3 are patterned byselective etching to form bumps 2 a for interconnecting upper and lowerwirings. In this selective etching, the etching stop layer 3 preventswiring films 4 a from being etched at the time of etching the bumpforming metal layer 2. Then, when the selective etching of the bumpforming metal layer 2 is completed, etching is conducted for the etchingstop layer 3 using as a mask copper that is a material which forms thebump forming metal layer 2 and the wiring film forming metal layer 4.

After that, an insulating film 5 made of for example a resin is bondedonto a forming surface of the above bumps 2 a so as to expose only thetop portions of the bumps 2 a from the surface of the film 5.

On the other hand, with respect to the above multi-layer metal plate 1b, the wiring film forming metal layer 4 is patterned to form wiringfilms 4 a. At this time, the etching stop layer 3 prevents etching ofthe bump forming metal layer 2. FIG. 1(B) shows the multi-layer metalplate 1 b in which the formation of the wiring films 4 a is completedand the multi-layer metal plate 1 a in which the formation of theinsulating film 5 is completed.

Note that, hereinafter, the wiring films 4 a and the bumps 2 a of themulti-layer metal plate 1 are also formed by the above method.

(C) Next, the bumps 2 a of the multi-layer metal plate 1 a are connectedwith the wiring films 4 a of the multi-layer metal plate 1 b and themulti-layer metal plates 1 a and 1 b are laminated. FIG. 1(C) shows astate after the lamination.

(D) Next, the bump forming metal layer 2 and the etching stop layer 3 ofthe above multi-layer metal plate 1 b are patterned by selective etchingto form bumps 2 a. FIG. 1(D) shows a state after the formation of thebumps 2 a.

(E) Next, an insulating film 5 made of for example a resin is bondedonto a surface for forming the above bumps 2 a so as to expose only thetop portions of the bumps 2 a from the surface of the insulating film 5.Then, a multi-layer metal plate 1 c is prepared as a new multi-layermetal plate. With respect to the multi-layer metal plate 1 c, a wiringfilm forming metal layer 4 of the multi-layer metal plate 1 having thesame structure as the multi-layer metal plates 1 a and 1 b each having athree layers structure shown in FIG. 1(A) is patterned by selectiveetching to form wiring films 4 a. FIG. 2(E) shows a state in which abump 2 a forming side surface of a laminate of the multi-layer metalplates 1 a and 1 b faces a wiring film 4 a forming side surface of themulti-layer metal plate 1 c in which the formation of the wiring films 4a is completed.

(F) Next, as shown in FIG. 2(F), the bumps 2 a of the multi-layer metalplate 1 a are connected with the wiring films 4 a of the multi-layermetal plate 1 b and the multi-layer metal plate 1 c is laminated ontothe multi-layer metal plate 1 b.

(G) Next, the bump forming metal layer 2 and the etching stop layer 3 ofthe multi-layer metal plate 1 b are patterned by selective etching toform bumps 2 a. Then, an insulating film 5 made of for example a resinis bonded onto a forming surface of the bumps 2 a so as to expose onlythe top portions of the bumps 2 a from the film 5.

Then, a multi-layer metal plate 1 d is prepared as a new multi-layermetal plate. With respect to the multi-layer metal plate 1 d, a wiringfilm forming metal layer 4 of the multi-layer metal plate having thesame structure as the multi-layer metal plates 1 a, 1 b and 1 c eachhaving a three layers structure shown in FIG. 1(A) is patterned byselective etching to form wiring films 4 a. FIG. 2(G) shows a state inwhich a bump 2 a forming side surface of a laminate of the multi-layermetal plates 1 a, 1 b and 1 c after the formation of the insulating film5 faces a wiring film 4 a forming side surface of the new multi-layermetal plate 1 d.

(H) Next, as shown in FIG. 2(H), the bumps 2 a of the multi-layer metalplate 1 b are connected with the wiring films 4 a of the multi-layermetal plate 1 c and the multi-layer metal plate 1 d is laminated to thelaminate of the multi-layer metal plates 1 a, 1 b and 1 c.

(I) Next, a bump forming metal layer 2 and an etching stop layer 3 of amulti-layer metal plate 1 d are patterned by selective etching to formbumps 2 a. After that, an insulating film 5 made of for example a resinis bonded onto a surface for forming the bumps 2 a such that it isbroken through by the bumps 2 a so that the top portions of the bumpsprotrude therefrom.

After that, a multi-layer metal plate le is prepared as a newmulti-layer metal plate. With respect to the multi-layer metal plate 1e, a wiring film forming metal layer 4 of a multi-layer metal platehaving the same structure as the multi-layer metal plates 1 a and 1 beach having a three layers structure shown in FIG. 1(A) is patterned byselective etching to form wiring films 4 a. FIG. 3(I) shows a state inwhich a bump 2 a forming side surface of a laminate of the multi-layermetal plates 1 a to 1 d obtained after the formation of the insulatingfilm 5 faces a wiring film 4 a forming surface of the new multi-layermetal plate 1 e.

(J) Next, the bump forming metal layer 2 and the etching stop layer 3 ofthe above multi-layer metal plate 1 e are patterned by selective etchingto form bumps 2 a. Then, an insulating film 5 made of for example aresin is bonded onto its bumps 2 a forming surface so as to expose onlythe top portions of the bumps 2 a from the surface of the film 5. Afterthat, a wiring film forming metal thin plate 6 made of copper isconnected with the bumps 2 and laminated onto the bump 2 a formingsurface side. FIG. 3(J) shows a state after the lamination.

(K) Next, the wiring film forming metal layer 4 of the above multi-layermetal plate 1 a (the uppermost multi-layer metal plate in FIGS. 1 to 3)and the above wiring film forming metal thin plate 6 are patterned byselective etching to form wiring films 4 a and 6 a. Then, the wiringfilms 4 a become the uppermost layer wiring films and the wiring films 6a become the lowermost layer wiring films.

Summarizing this multi-layer wiring board manufacturing method, themulti-layer metal plate 1 a is used as a base, the bump forming metallayer 2 and the etching stop layer 3 thereof are patterned to form thebumps 2 a, the insulating film 5 is bonded onto the bump 2 a formingsurface such that it is broken through by the bumps 2 a so as to causethe top portions thereof to protrude from the surface of the insulatingfilm 5, and then the wiring films 4 a of another multi-layer metal plate1 b in which the wiring films 4 a are formed by patterning the wiringfilm forming metal layer 4 are connected with the bumps 2 a of themulti-layer metal plate 1 a, and the multi-layer metal plates 1 a and 1b are laminated. Such a lamination process is repeated formulti-layering in a manner such that the wiring film 6 a forming surfaceof another multi-layer metal plate 1 is always overlapped on the bumps 2a forming surface of another multi-layer metal plate 1. Finally, thewiring film forming metal layer 4 and the wiring film forming metal thinplate 6 which are located on the uppermost surface and the lowermostsurface, respectively, are patterned to form the wiring films 4 a andthe wiring films 6 a which are located on the uppermost surface and thelowermost surface, respectively. Thus, by increasing the number ofrepetitions of the above lamination process, the number of layers of thewiring board can be increased.

According to this multi-layer wiring board manufacturing method, withrespect to interconnection between upper and lower wirings, theconventional technique, in which the hole is formed in the insulatingplate as a base, the metal plating film for interconnecting upper andlower wirings is formed on the inner peripheral surface thereof, andthen the hole is filled, is not followed, but the bumps 2 a formed bypatterning the bump forming metal layer 2 of the multi-layer metalwiring 1 are used as upper and lower wirings interconnecting means.Thus, as compared with a conventional case, the region of a portionrequired for interconnecting upper and lower wirings can be extremelynarrowed such that a diameter thereof is for example 0.1 mm or less.

When the upper and lower wirings interconnecting portion can benarrowed, not only a direct effect is produced with respect toimprovement of integration due to the narrowing of an area which itselfoccupies but also an indirect effect is produced in that adverseinfluence on other wiring films such that the number of them to beforced to make a detour is reduced. In other words, due to the indirecteffect that adverse influence on other wiring films is reduced thenumber of wiring films which are forced to make a detour can be reducedand the detour length of the wiring film which is forced to make adetour can be also shortened. Thus, the integration can be markedlyimproved.

Also, the lamination process is repeated for multi-layering insuccession in a manner such that the wiring film 4 a forming surface ofone multi-layer metal plate 1 is always overlapped on the bumps 2 aforming surface of another multi-layer metal plate 1. Thus, according tothe number of repetition processes, the number of layers of themulti-layer metal plates can be arbitrarily increased so that a wiringboard with a very high integration can be provided.

Note that the respective wiring boards 1 a, 1 b, 1 c, . . . may belaminated after the formation of the wiring films 4 a and the bumps 2 aand bonding of the insulating film 5.

Note that, according to the above first embodiment mode, a laminateobtained by laminating the wiring film forming metal layer 4 on the bumpforming metal layer 2 through the etching stop layer 3 is prepared as abase and the wiring film forming metal layer 4 is selectively etched forpatterning to form the wiring films 4 a of the multi-layer metal plate 1a, 1 b, or the like. The wiring films 4 a can be also formed by plating.When the wiring films 4 a are formed by plating, side etching caused inthe case where the wiring film forming metal layer 4 is patterned byphoto etching is not occurred. Thus, minute wiring films 4 a can beformed at high integration.

Specifically, a method of preparing a laminate obtained by laminatingthe etching stop layer 3 on the bump forming metal layer 2 as a base,selectively forming for example a photo resist film on an anti-bumpforming metal layer side surface of the etching stop layer 3, andplating for example metal such as copper using the photo resist film asa mask to form the wiring films 4 a is preferable. In addition, thewiring films may be directly formed on the surface of the etching stoplayer 3 by plating. Alternatively, a thin plating base layer made of forexample copper may be formed on the surface of the etching stop layerand the wiring films 4 a may be formed on the plating base layer byplating using the photo resist film as a mask. In this case, it isnecessary to etch the thin plating base layer using the wiring films 4 aas a mask after the formation of the wiring films 4 a.

FIGS. 4 to 11 are explanatory views of a second embodiment mode of amulti-layer wiring board manufacturing method according to the presentinvention. According to this embodiment mode, a row material isprocessed to prepare plural types of basic wiring boards 50 (forexample, 50α, 50β, 50γ and 50δ) composing a multi-layer wiring board,and arbitrary boards are combined from the plural types of basic wiringboards and laminated to produce a multi-layer wiring board 51 (forexample, 51 a, 51 b, 51 c or 51 d). FIGS. 4 to 7 are explanatory viewsof a basic wiring board manufacturing method or respective basic wiringboards. FIGS. 4(A) to 4(D) show a method of manufacturing a firstexample 50α of the basic wiring boards in step order. FIG. 5 shows asecond example 50 β of the basic wiring boards. FIG. 6 shows a thirdexample 50 γ of the basic wiring boards. FIG. 7 shows a fourth example50 δ of the basic wiring boards.

First, a method of manufacturing the first example 50α will be describedwith reference to FIGS. 4(A) to 4(D).

(A) First, as shown in FIG. 4(A), a multi-layer metal plate 1 a isprepared. The multi-layer metal plate 1 a may be the same as for examplethe multi-layer metal plate 1 a shown in FIG. 1(A). In other words, alaminate obtained by laminating a wiring film forming metal layer 4 madeof copper foil having a thickness of for example 18 μm on one mainsurface of a bump forming metal layer 2 made of copper foil having athickness of 100 μm through an etching stop layer 3 made of a nickellayer having a thickness of for example 2 μm is prepared.

(B) Next, with respect to the above multi-layer metal plate 1 a, thebump forming metal layer 2 and the etching stop layer 3 are patterned byselective etching to form bumps 2 a for interconnecting upper and lowerwirings. Then, when the selective etching of the bump forming metallayer 2 is completed, etching is conducted for the etching stop layer 3using as a mask copper that is a material which forms the bump formingmetal layer 2 and the wiring film forming metal layer 4.

After that, an insulating film 5 made of for example a resin is bondedonto a forming surface of the above bumps 2 a so as to expose only thetop portions of the bumps. Then, as shown in FIG. 4(B), a surface of themulti-layer metal plate 1 a on the side where the top portions of thebumps 2 a protrude is made to face a wiring film forming metal thinplate 6 made of, for example, copper.

(C) Next, as shown in FIG. 4(C), the above wiring film forming metalthin plate 6 is connected with the bumps 2 a and laminated on the bump 2a forming surface side.

(D) Next, the wiring film forming metal layer 4 of the above multi-layermetal plate 1 a and the above wiring film forming metal thin plate 6 arepatterned by selective etching to form wiring films 4 a and 6 a. Thus,the basic wiring board 50α is manufactured. The wiring films 4 a becomeupper layer wiring films and the wiring films 6 a become lower layerwiring films.

FIG. 5 shows the basic wiring board 50β. This can be manufactured byselectively etching the wiring film forming metal thin plate 6 to formonly the wiring films 6 a without selectively etching the wiring filmforming metal layer 4, that is, without forming the wiring films 4 a ofthe upper layer in the step of the manufacturing method shown in FIG.4(D) of FIG. 4.

FIG. 6 shows the basic wiring board 50γ. The basic wiring board 50γ canbe manufactured by the same steps as the steps shown in FIGS. 1(A) to1(D).

FIG. 7 shows the basic wiring board 50δ. An insulating film 5 is formedon a bump 2 a forming side surface of the basic wiring board 50γ shownin FIG. 6 so as to expose only the top portions of the bumps 2 a fromthe insulating film 5, and the wiring film forming metal layer 4 ispatterned by photo etching to form wiring films 4 a. Thus, the basicwiring board 50δ can be manufactured.

FIGS. 8 to 11 are explanatory views of examples 51 a to 51 d ofrespective multi-layer wiring boards manufactured by combining the abovebasic wiring boards 50α, 50β, 50γ and 50δ and laminating them. FIG. 8(A)shows the basic wiring boards 50γ and 50α used for manufacturing themulti-layer wiring board 51 a. FIG. 8(B) shows a state in which thebasic wiring board 50γ is laminated on the upper surface of the basicwiring board 50α. Then, the wiring film forming metal layer 4 being theuppermost layer and the wiring film forming metal thin plate 6 being thelowermost layer in the laminate with the state shown in FIG. 8(B) arepatterned by for example photo etching to form wiring films 4 a and 6 a(not shown). Thus, the multi-layer wiring board 51 a with 4 layers ismanufactured.

FIG. 9(A) shows the basic wiring boards 50γ, 50α, and 50γ used formanufacturing the multi-layer wiring board 51 b.

FIG. 9(B) shows a state in which the basic wiring boards 50γ and 50γsandwich the basic wiring board 50α and are laminated in a verticaldirection such that their respective bump 2 a sides face the basicwiring board 50α side. Then, the wiring film forming metal layers 4 and4 being the uppermost layer and the lowermost layer in the laminate withthe state shown in FIG. 9(B) are patterned by for example photo etchingto form wiring films 4 a and 4 a (not shown). Thus, the multi-layerwiring board 51 b with 6 layers is manufactured.

FIG. 10(A)-shows the basic wiring boards 50γ, 50α, 50δ and 50γ used formanufacturing the multi-layer wiring board 51 c (not shown). FIG. 10(B)shows a state in which the basic wiring board 50δ in which a bump 2 aside surface is oriented to face upward is laminated on the basic wiringboard 50γ in which a bump 2 a side surface is oriented to face upward,the basic wiring board 50α is laminated on the basic wiring board 50δ,and the basic wiring board 50γ in which a bump 2 a forming side isoriented to face downward is laminated on the basic wiring board 50α.Then, the wiring film forming metal layers 4 and 4 as the uppermostlayer and the lowermost layer of the laminate in the state shown in FIG.10(B) are patterned by for example photo etching to form wiring films 4a and 4 a (not shown). Thus, the multi-layer wiring board 51 c with 8layers is manufactured.

FIG. 11(A) shows the basic wiring boards 50γ, 50α, 50δ and 50 γused formanufacturing the multi-layer wiring board 51 d. FIG. 11(B) shows astate in which the basic wiring board 50δ whose bump 2 a side surface isoriented to face upward is laminated on the basic wiring board 50 γwhose bump 2 a side surface is oriented to face upward, the basic wiringboard 50α is laminated on the basic wiring board 50 δ, the basic wiringboard 50 δ whose bump 2 a and insulating film 5 forming side is furtheroriented to face downward is laminated on the basic wiring board 50α,and further, the basic wiring board 50γ whose bump 2 a and insulatingfilm 5 forming side is oriented to face downward is laminated on thebasic wiring board 50δ. Then, the wiring film forming metal layers 4 and4 being the uppermost layer and the lowermost layer of the laminate inthe state shown in FIG. 11(B) are patterned by for example photo etchingto form wiring films 4 a and 4 a (not shown). Thus, the multi-layerwiring board 51 d with 10 layers is manufactured.

As described above, it is also possible to adopt a mode in which a rowmaterial is processed to prepare plural types 50α, 50β, 50γ, and 50δ ofbasic wiring boards 50 composing the multi-layer wiring board, andarbitrary boards are combined from the plural types of basic wiringboards and laminated to manufacture the multi-layer wiring boards 51 a,51 b, 51 c and 51 d. Thus, the multi-layer wiring board 51 with thearbitrary number of layers (for example, 4 to 10 layers) can beobtained.

Also in the case of the second embodiment mode of a multi-layer wiringboard manufacturing method according to the present invention,substantially the same effect as that obtained by the first embodimentmode can be obtained.

FIGS. 12(A) to 12(E), and FIGS. 13(F) to 13(I) are sectional viewsshowing in order steps (A) to (I) in accordance with a third embodimentmode of a multi-layer wiring board manufacturing method of the presentinvention.

(A) A multi-layer metal plate 20 a in which a wiring film forming metallayer 23 (not shown) made of copper foil is laminated on one of surfacesof a bump forming metal layer 21 made of copper foil through an etchingstop layer 22 made of nickel is prepared, and the wiring film formingmetal layer 23 is patterned by selective etching to form wiring films 23a. At this time, the etching stop layer 22 acts to prevent the bumpforming metal layer 21 from being etched. FIG. 12(A) shows a state afterthe formation of the wiring films 23 a.

(B) Next, as shown in FIG. 12(B), a thin copper film 24 is plated on awiring film 23 a forming side surface of the multi-layer metal plate 20a. The copper film 24 acts to prevent etching of an etching stop layer(25), which is made of nickel and is formed on the copper film 24 in thenext step, when the above etching stop layer 22 is selectively etchedlater. Note that, by conducting precise control of etching thickness, itis not impossible to omit the step of forming the copper film 24. Thus,this step is not necessarily essential.

(C) Next, as shown in FIG. 12(C), the etching stop layer 25 made ofnickel is formed on a wiring film 23 a forming side surface of the abovemulti-layer metal plate 20 a by plating.

(D) Next, as shown in FIG. 12(D), a bump forming metal layer 26 made ofcopper is formed on the wiring film 23 a forming side surface of themulti-layer metal plate 20 a by clad lamination or plating.

(E) Next, as shown in FIG. 12(E), the bump forming metal layer 21 andthe etching stop layer 22 of the above multi-layer metal plate 20 a arepatterned by selective etching to form bumps 21 a.

(F) Next, an insulating film 27 is bonded to the bumps 21 a on a bump 21a forming side surface of the above multi-layer metal plate 20 a suchthat it is broken through by the bumps 21 a so as to cause the topportions thereof to protrude. After that, a wiring film forming metalthin plate 28 is connected with the bumps 21 a and laminated on theinsulating film 27. FIG. 13(F) shows a state after bonding of the wiringfilm forming metal thin plate 28.

(G) Next, as shown in FIG. 13(G), the above bump forming metal layer 26and the etching stop layer 25 are patterned by selective etching to formbumps 26 a.

(H) Next, as shown in FIG. 13(H), the above copper film 24 is etched toelectrically insulate between the respective wiring films 23 a.

(I) Next, an insulating film 30 is bonded to a bump 26 a forming sidesurface of the multi-layer metal plate 20 a such that it is brokenthrough by the bumps 21 a to protrude the top portions thereof. Afterthat, a wiring film forming metal thin plate 31 is connected with thebumps 26 a and laminated on the insulating film 30. FIG. 13(I) shows astate after bonding of the wiring film forming metal thin plate 31.

After that, although not shown, the above wiring film forming metal thinplate 28 and 31 are patterned by selective etching to form wiring films.Thus, a wiring board with 3 layers in which interlayer connections areprovided through the bumps 21 a and 26 a can be obtained.

Here, the example of the wiring plate with 3 layers is described.However, it can be also applied to a multi-layer wiring plate with morelayers. In other words, by combining the metal thin plate 28 shown inFIG. 13(F) (not shown) which has been patterned and another metal thinfilm bonded to the bumps 26 a shown in FIG. 13(H) such that it breaksthrough an insulating layer (not shown) so as to cause the top portionsthereof to protrude (not shown), a multi-layer plate with 3 or morelayers can be also obtained.

Also in this multi-layer wiring board manufacturing method, as comparedwith a conventional case, a region of a portion required forinterconnecting upper and lower wirings can be extremely narrowed bymaking a diameter thereof for example 0.1 mm or less. Thus, not only adirect effect is obtained with respect to improvement of integration dueto the narrowing of an necessary area therefor but also an indirecteffect can be obtained in that adverse influence on other wiring filmssuch that they have to be forced to make a detour is reduced. In otherwords, due to the indirect effect that adverse influence on other wiringfilms is reduced, an effect is produced in that the number of wiringfilms that are forced to make a detour can be reduced and the detourlength of the wiring film which is forced to make a detour can be alsoshortened.

FIGS. 14(A) and 14(B) are sectional views showing steps (A) and (B)being a part of a modified example obtained by modifying the thirdembodiment mode of a multi-layer wiring board manufacturing methodaccording to the present invention as shown in FIGS. 12 and 13. In thismodified example, a multi-layer metal board 20 b in which an etchingstop layer 22 made of nickel is formed on a bump forming metal layer 21made of copper, a plating base layer 30 made of copper is formed on theetching stop layer 22, and wiring films 23 a having a predeterminedpattern are formed on the plating base layer 30 by plating copper usinga selectively formed resist film as a mask is used. FIG. 14(A) shows themulti-layer metal board 20 b and FIG. 14(B) shows a state after anetching stop layer 25 made of nickel is formed on the multi-layer metalboard 20 b. These correspond to the step shown in FIG. 12(C). Afterthat, processing performed subsequent to the step shown in FIG. 12(D) inthe third embodiment mode shown in FIGS. 12 and 13 is conducted.

Also in this example, the same effect as in the third embodiment modeshown in FIGS. 12 and 13 can be obtained and a pattern having higherprecision than a pattern by etching can be formed.

FIGS. 15(A) to 15(E) are sectional views showing in order of steps of afourth embodiment mode of a multi-layer wiring board manufacturingmethod according to the present invention.

(A) As shown in FIG. 15(A), a multi-layer metal plate 40 with 5 layersin which an etching stop layer 22 made of nickel is laminated on a bumpforming metal layer 21 made of copper, a wiring film forming metal layer23 made of copper is laminated on the etching stop layer 22, a layer 41made of nickel is laminated on the wiring film forming metal layer 23,and a copper layer 42 is formed on the layer 41 is prepared as amulti-layer metal plate. The nickel layer 41 and the copper layer 42 ofthe multi-layer metal plate 40 compose a reinforcing layer 43 which ispeeled off later and act to prevent the multi-layer metal plate 40 frombecoming liable to cause a defect such as warping and bending due toinsufficient mechanical strength. In addition, by continuouslyprotecting the surface of the wiring film forming metal layer during aperiod of from the first step to the wiring film patterning step, theyact to prevent the damage or the like to the surface during for examplea press step and therefore to prevent a defect from being caused informed wiring films. Further, they also act to protect the surface ofthe wiring film forming metal layer from a chemical solution and toprevent deposition of contaminants on the surface.

Note that the multi-layer metal plate 40 may be formed as follows. Thenickel layer 41 is formed by plating on the surface of the wiring filmforming metal layer 23 of the multi-layer metal plate with 3 layerswhich is composed of the bump forming metal layer 21, the etching stoplayer 22, and the wiring film forming metal layer 23, and the copperlayer 42 is formed by plating on the surface of the nickel layer 41.Alternatively, it may be formed by laminating 5 clad layers composed ofthe bump forming metal layer 21, the etching stop layer 22, the wiringfilm forming metal layer 23, the nickel layer 41, and the copper layer42.

(B) Next, as shown in FIG. 15(B), the bump forming metal layer 21 ispatterned by selective etching to form bumps 21 a.

(C) Next, as shown in FIG. 15(C), an insulating film 44 is bonded to abump 21 a forming side surface of the multi-layer metal plate 40 suchthat it is broken through by the bumps 21 a to cause the top portionsthereof to protrude.

(D) After that, a wiring film forming metal thin plate 45 is connectedwith the bumps 21 a and laminated on the insulating film 44. FIG. 15(D)shows a state after bonding of the wiring film forming metal thin plate45. In this state, the mechanical strength of the multi-layer metalplate 40 is greater than that in the state shown in FIG. 15(B). Thus,there is almost no possibility that it is warped and bent to cause adefect.

(E) After that, the reinforcing layer 43 is peeled off as shown in FIG.15(E) so that the insulating film can be formed by patterning the wiringfilm forming metal layer 23 and the wiring film forming metal thin plate45 by selective etching.

According to such a fourth embodiment mode, the multi-layer metal platein a state in which it is thin and its mechanical strength is low isreinforced with the reinforcing layer 43. Thus, workability is improvedand a fraction defective can be reduced. In addition, the surface of thewiring film forming metal layer is continuously protected during aperiod of from the first step to the wiring film patterning step. Thus,damage or the like to the surface during for example a pressing step canbe prevented and it can be prevented that a defect is caused in formedwiring films. Further, the surface of the wiring film forming metallayer can be protected from a chemical solution and deposition ofcontaminants on the surface can be prevented.

FIGS. 16(A) to 16(E) are sectional views showing in order of steps afifth embodiment mode of a multi-layer wiring board manufacturing methodaccording to the present invention.

(A) As shown in FIG. 16(A), a multi-layer metal plate 60 in which anetching stop layer 22 made of nickel is laminated on a bump formingmetal layer 21 made of copper and a wiring film forming metal layer 23made of copper is laminated on the etching stop layer 22 is prepared asa multi-layer metal plate. A heat resistant film 62 having a peelinglayer 61 is laminated on the wiring film forming metal layer 23 of themulti-layer metal plate 60.

The peeling layer 61 and the heat resistant film 62 compose areinforcing layer 63 which is peeled off later and act to prevent themulti-layer metal plate 60 from becoming liable to cause a defect suchas warping and bending due to insufficient mechanical strength. Inaddition, the surface of the wiring film forming metal layer iscontinuously protected during a period of from the first step to thewiring film patterning step so that they act to prevent damage or thelike to the surface during for example a pressing step and to prevent adefect from being caused in formed wiring films. Further, they also actto protect the surface of the wiring film forming metal layer from achemical solution and to prevent deposition of contaminants on thesurface.

Note that the peeling layer 61 is formed at a thickness of for example 1to 3 μm using an organic system agent. The organic system agent is madeof a kind or plural kinds of materials selected from the groupconsisting of an organic compound containing nitrogen, an organiccompound containing sulfur and a carboxylic acid.

Of those, the nitrogen-containing organic compound includes anitrogen-containing organic compound having a substituent. As thenitrogen-containing organic compound, specifically, it is preferred that1,2,3-benzotriazole, carboxybenzotriazole, etc. which are a triazolecompound having a substituent are used. As the sulfur-containing organiccompound, it is preferred that mercaptobenzothiazole, thiocyanuric acid,etc. are used. Moreover, as the carboxylic acid, it is preferred thatparticularly a monocarboxylic acid is used and that among these, oleicacid, linoleic acid, linolenic acid, etc. are used.

Furthermore, the heat resistant film 62 is formed to have a thicknessof, for example, 10 to 100 μm by using a polymer. As the polymer, it ispreferred that a polyphenylene sulfide resin, a polyetherimide resin, aliquid crystal polymer film or polyetheretherketone resin, etc. is used.

(B) Next, as shown in FIG. 16(B), the bump forming metal layer 21 ispatterned by selective etching to form bumps 21 a.

(C) Next, as shown in FIG. 16(C), an insulating film 44 is bonded to abump 21 a forming side surface of the multi-layer metal plate 40 suchthat it is broken through by the bumps 21 a so as to cause the topportions thereof to protrude.

(D) After that, a wiring film forming metal thin plate 45 is connectedwith the bumps 21 a and laminated on the insulating film 44. FIG. 16(D)shows a state after bonding of the wiring film forming metal thin plate45. In this state, the mechanical strength of the multi-layer metalplate 40 is greater than that in the state shown in FIG. 16(B). Thus,there is almost no possibility that it is warped and bent to cause adefect.

(E) After that, the reinforcing layer 63 is peeled off as shown in FIG.16(E) such that the wiring film can be formed by patterning the wiringfilm forming metal layer 23 and the wiring film forming metal thin plate45 by selective etching.

According to such a fifth embodiment mode, the same effect as in thefourth embodiment mode can be obtained. In addition to this, an effectcan be obtained particularly in that simplified process is realized. Inother words, when the reinforcing layer 43 is made of metal such asnickel or copper as in the fourth embodiment mode, the number of stepsis increased because etching is required for peeling the layer. On theother hand, in the case where the reinforcing layer 63 is composed ofthe peeling layer 61 and the heat resistant film 162 as in the fifthembodiment mode, when the process is about to be transferred to thewiring film patterning step (when it is transferred from FIG. 16(D) to16(E)), it is sufficient to merely peel the heat resistant film and thussimplified process can be realized as a result.

FIG. 17 is a side view showing a polishing machine 11 a of using for useof a sixth embodiment mode of a multi-layer wiring board manufacturingmethod according to the present invention. In the drawing, 12 denotes abase (base member) of the polishing machine 11 a for wiring board and 13denotes a suction table provided on the base 12. When the multi-layermetal plate 1 a is located on the upper surface of the table, the tablestrongly sucks the plate by vacuum suction and holds it. 14, 14, . . .denote column supports. An X-directional moving mechanism 15 which movesin an X-direction (horizontal direction in the drawing) is supported bythe column supports 14, 14, . . .

The above X-directional moving mechanism 15 causes an X-directionalmoving drive motor 17 to rotate a spindle 16 extended in the X-directionso that an X-directional moving body 18 is moved in the X-directionwhile it is guided by an X-directional guide body 19 in parallel to themetal plate 1 a. This corresponds to the cutter moving in parallel tothe metal plate 1 a of claim 16.

The X-directional moving mechanism 15 will be specifically described. Amale screw is formed on an outer circumferential surface of the abovespindle 16. In addition, the X-directional moving body 18 has a femalescrew portion which is not shown. The above spindle 16 is screwed intothe female screw portion. Thus, when the spindle 16 is rotated by themotor 17, the X-directional moving body 18 can be moved in theX-direction in parallel to the metal plate 1 a.

20 denotes a Y-directional moving mechanism attached perpendicular tothe above X-directional moving body 18, which moves a Y-directionalmoving mechanism 21 in a Y-direction (vertical direction to the metalplate 1 a in FIG. 17). In other words, when a Y-directional moving drivemotor 22 is rotated, the Y-directional moving mechanism 20 moves theY-directional moving mechanism 21 while guiding it in the Y-direction bya Y-directional guide body 23 set vertical to the metal plate 1 a. TheY-directional moving mechanism 20 corresponds to a height adjustingmechanism in claim 17.

When a Z-directional moving drive motor which is not shown is rotated,the above Z-directional moving mechanism 21 can move a Z-directionalmoving body 24 in a Z direction (direction from a paper rear side to apaper front side or reversely in parallel to the metal plate 1 a in FIG.17). A cutter holding means 25 for holding a cutter 26 having a largewidth is fixed to the Y-directional moving body 24.

Polishing by the polishing machine 11 a for wiring circuit members asshown in FIG. 17 is conducted as follows.

First, the multi-layer metal plate 1 a is set on the suction table 13,strongly sucked by vacuum suction, and held. Note that the metal plate 1a is polished by the polishing machine 11 a for wiring board.

Then, the cutter holding means 25 is moved to the left side such thatthe cutter 26 is located in the left side of the left end of the metalplate 1 a. In addition, a Y-directional positioning is conductedaccording to the rotation of a Y-directional moving drive motor which isnot shown and further, the height of the cutter 26 is adjusted accordingto the rotation of the Y-directional moving drive motor 22. When theadjustment is completed, the cutter holding means 25 is moved to theright side by the X-directional moving drive motor 17 to conductpolishing. FIG. 17 shows a state during the polishing.

When moving to the right side is completed, the cutter holding means 25is returned to the initial left side end in the X-direction. Next, thecutter holding means 25 is moved in the Z-direction by the width of thecutter 26. In addition, the cutter holding means 25 is further moved tothe right side to conduct polishing.

When such polishing is repeated and polishing over the entire region ofthe metal plate 1 a completed, the metal plate 1 a is removed, a nextmetal plate 1 a is set, and polishing to this is similarly repeated.

According to such polishing using the polishing machine 11 a for wiringboard, when the cutter 26 is moved by only 1 stroke, polishing can beconducted on an area corresponding to the product of a length of 1stroke and the width of the cutter 26. Thus, polishing efficiency can beimproved. Accordingly, a large number of metal plates 1 a can bepolished in an extremely short time and in a manner of mass production.

Therefore, manufacturing costs and manufacturing prices for a wiringboard composed of the metal plate 1 a and an electronic member using thewiring board, and further an electronic device using the electronicmember can be reduced.

Note that a vibration means for applying low frequency vibration orultrasonic vibration for the cutter 26 is provided to the above cutterholding means 25, and it can be moved parallel to the surface of themetal plate 1 a to conduct polishing while the low frequency vibrationor the ultrasonic vibration for the cutter 26 is conducted by the cutterholding means 25. Thus, the surface can be smoothly and preferablyfinished.

FIG. 18 is a side view showing a polishing machine for use of a seventhembodiment mode of a multi-layer wiring board manufacturing method ofthe present invention. In the drawing, 30 a denotes a rough polishingportion and 30 b denotes a finish polishing portion. Both are locatedsuch that finish polishing is conducted by the finish polishing portion30 b immediately after the metal plate 1 a for which rough polishing iscompleted by the rough polishing portion 30 a is aligned. With respectto the rough polishing portion 30 a and the finish polishing portion 30b, roughnesses of whetstones 32 around whetstone rollers 31 rotated bymotors which are not shown are different. The whetstone roller 31 of therough polishing portion 30 a is rough and the whetstone roller 31 of thefinish polishing portion 30 b is fine. Except for this point, theconfiguration is substantially the same. Thus, only one 30 a will bedescribed in detail and the description of different point with respectto the other 30 b will be omitted.

33 denotes a carrying belt for carrying the metal plate 1 a. 34 denotesa cover which is provided to prevent the metal plate 1 a from deviatingdownward. 35 denotes a carrying roll which is vertically shifted by anair cylinder 36 and acts to carry the metal plate 1 a between thewhetstone roller 31 and a backup roller 37.

The above backup roller 37 presses the metal plate 1 a to the whetstoneroller 31 by the air cylinder 36.

39 denotes a dust collecting cover for collecting dust produced bypolishing. 40 denotes an alignment stopper located over the carryingbelt 33 for carrying from the rough polishing portion 30 a to the finishpolishing portion 30 b, which is driven by an air cylinder 41 andadjusts the direction of the metal plate 1 a for which finish polishingis to be conducted after the rough polishing.

Polishing by a polishing machine 11 b for wiring board as shown in FIG.18 is conducted as follows.

When the metal plate 1 a is put on the carrying belt 33 in the frontside (right side in FIG. 18) of the rough polishing portion 30 a, themetal plate 1 a is carried by the carrying belt 33 and guided by thecarrying roller 35 between the whetstone roller 31 and the backup roller37 which rotate. Then, it is entered with pressing between the whetstoneroller 31 and the backup roller 37 which rotate, and during passingtherebetween, the metal plate 1 a is roughly polished by the whetstoneroller 31 and discharged. Note that the metal plate 1 a is set such thatthe surface to be polished is in contact with the whetstone roller 31.

Then, it is carried to the finish polishing portion 30 b side by thecarrying belt 33 and aligned by an alignment stopper 40. When thealignment is completed, the alignment stopper 40 is lifted, the metalplate 1 a is carried to the finish polishing portion 30 b side by thecarrying belt 33, guided between the whetstone roller 31 and the backuproller 37, and polished for finish. Then, it is discharged from a spacebetween the whetstone roller 31 and the backup roller 37 and carried bythe carrying belt 33 to complete polishing.

According to such a polishing machine 11 b for wiring board, when themetal plate 1 a is set on the carrying belt 33 in the front side of therough polishing portion 30 a, the rough polishing and the finishpolishing are automatically conducted in succession. Thus, polishingwith high efficiency can be made to proceed in a manner of massproduction.

Note that, instead of the polishing rollers, buff rollers may be used asthe rollers 31 and 31 of the rough polishing portion 30 a and the finishpolishing portion 30 b. In this case, it is needless to say that aroller which is rough with respect to surface roughness is used as thebuff roller 31 of the rough polishing portion 30 a and a roller which isfine with respect to surface roughness is used as the buff roller of thefinish polishing portion 30 b.

FIGS. 19(A) and 19(B) show a polishing machine 11 c of an eighthembodiment mode of a multi-layer wiring board manufacturing methodaccording to the present invention. FIG. 19(A) is a perspective view ofthe polishing machine 11 c for wiring board and FIG. 19(B) is a sideview showing a state of polishing by a cutting roller.

12 denotes a base (base member) which has in its inner portion anX-directional carrying mechanism for carrying a pair of column supports14 and 14 in an X-direction through both side portions, which is notshown. The X-directional carrying mechanism corresponds to a cuttingroller parallel moving mechanism of claim 22. 13 denotes a suction tableprovided on the base 12 within moving regions of the both side portionsin which the column supports 14 and 14 move, which strongly sucks themetal plate 1 a by vacuum suction and holds to support it.

15 denotes an Y-directional moving mechanism, which moves aY-directional moving body (not shown) by a Y-directional moving motor17. 20 denotes a Z-directional moving mechanism attached to theY-directional moving body (not shown), which guides a Z-directionalmoving plate 50 in a Z-direction by a Z-directional guide body 23 andmoves it by a Z-directional moving drive motor 22. The Z-directionalmoving mechanism 20 corresponds to a height adjusting mechanism of claim22.

A cutting roller 51 is provided to be rotatable in the lower portion ofthe above Z-directional moving plate 50 and a motor 52 for rotating itis provided in the upper portion. In the cutting roller 51, a pluralityof cutters 53, 53, (FIG. 19(B)) . . . each having a large width areformed on its peripheral surface in parallel to the rotational axis ofthe cutting roller 51 and cutting edges are protruded in a directionclose to the tangential direction. The cutting roller 51 is attached tothe Z-directional moving body 50 in a direction in which the rotationalaxis becomes parallel to the surface of the suction table 13. Inaddition, a reference guide roller 54 which acts as a pilot is attachedto the Z-directional moving plate 50 slightly before the cutting roller51. The reference guide roller 54 is controlled such that it is passedthrough a portion in which bumps are not present and acts as a pilot inY-directional position control.

The cutting roller 51 in the lower portion of the Z-directional movingplate 50 is rotated by the above motor 52 in the upper portion.Specifically, a belt is put between a pulley fixed to the rotationalshaft of the motor 52 and a pulley fixed to the rotational shaft of thecutting roller 51. The rotation of the motor 52 is transmitted to thecutting roller 51 through the belt so that the cutting roller 51 isrotated as shown in FIG. 19(B).

Note that 55 denotes a dust collecting unit for collecting dust producedby polishing.

Polishing by the polishing machine 11 c for wiring board as shown inFIG. 19 is conducted as follows.

The metal plate 1 a is set on the suction table 13. The metal plate 1 ais then strongly held by vacuum suction. A height of the cutting roller51 is adjusted by driving the Z-directional moving drive motor 22. Whilethe X-directional moving mechanism which is provided in the base 12 andnot shown is moved in the X-direction, the surface portion of the metalplate 1 a on the suction table 13 a is polished by cutting roller 51rotated by the motor 52. Then, when polishing by movement correspondingto 1 stroke in the X-direction is completed, it is returned to theX-direction. Next, the cutting roller 51 is shifted by about its widthby the Y-directional moving mechanism 15 and next polishingcorresponding to 1 stroke in the X-direction is conducted. Hereafter,polishing is continued until polishing over the entire region of themetal plate 1 a completed.

According to such polishing using the polishing machine 11 c for wiringboard as shown in FIG. 19, when it is moved by only 1 stroke while thecutting roller 51 is rotated, polishing can be conducted by an areacorresponding to the product of a length of 1 stroke and the width ofthe cutter 53 of the cutting roller 51. Thus, polishing efficiency canbe improved. Accordingly, a large number of metal plates 1 a arepolished in an extremely short time and in a manner of mass production.

Therefore, manufacturing costs and the price of a manufactured wiringboard composed of the metal plate 1 a and an electronic member using thewiring board, and an electronic device using the electronic member canbe reduced.

FIGS. 20(A) to 20(D) are explanatory views of a ninth embodiment mode ofa multi-layer wiring board according to the present invention. FIG.20(A) is a sectional view of a metal (copper) plate 1 a containingmainly copper, FIG. 20(B) is a sectional view of a processed metal plate1 a and a copper plate (layer) 202 bonded thereto, FIG. 20(C) shows asection of the copper plate 202 welded with pressure to bumps, and FIG.20(D) is a table indicating a reason why Vickers hardness of the metalplate 1 a is set to 80 to 150 Hv.

The above metal plate 1 a shown in FIG. 20(A) is formed by plating anickel layer 402 (for example 1 μm in thickness) on the surface of asubstantially pure copper layer 302 which has a thickness of for exampleabout 100 μm and is made of tough pitch copper, alloy copper, andelectrolytic copper foil. Further, it may be obtained by forming acopper layer (for example 18 μm in thickness) 505 on the surface of thenickel layer 402 by plating or a clad method.

In the metal plate 1 a, the copper layer 302 is made of substantiallypure copper and its hardness is adjusted (adjusted by the degree ofrolling, annealing, composition of plating, or the like) such thatVickers hardness becomes 80 to 150 Hv. This is a characteristic of themetal plate 1 a in this embodiment mode.

In the metal plate 1 a, the copper layer 302 is selectively etched toform bumps 2 a. After a resist used as a mask film at this etching isremoved, an insulating sheet is laminated, an insulating layer 7 forinterlayer insulation is formed by pressure application, and the copperlayer (copper foil) 202 is laminated thereon. FIG. 20(B) shows the metalplate 1 a and the copper layer 202 before this lamination and FIG. 20(C)shows the metal plate 1 a and the copper layer 202 after the lamination.As in the case of the copper layer 302 of the metal plate 1 a, thehardness of the copper layer 202 is also adjusted (adjusted by mixing ofan impurity, an annealing manner, or the like) such that Vickershardness becomes 80 to 150 Hv. This is a characteristic of the copperlayer 202 in this embodiment mode.

FIG. 20(D) shows using a table a reason why Vickers hardness is set to80 to 150 Hv with respect to hardnesses of the copper layer 302 of themetal plate 1 a and the copper layer 202 laminated thereon as describedabove.

FIG. 20(D) specifically shows whether or not respective wiring circuitforming boards manufactured by changing the hardnesses of the copperlayer 302 and the copper layer 202 of the metal plate 1 a to 62 Hv, 81Hv, 103 Hv, 135 Hv, and 155 Hv are accepted according to an HO (hot oil)test, a solder heat resistance test, a PCT (pressure cooker test), and amigration test. “o” indicates acceptance and “x” indicates rejection. InFIG. 20(D), the hardness indicates Vickers hardness [Hv] as a matter ofcourse.

Also, the HO test is the following test. A completed copper member(hereinafter referred to as a “work”) is immersed for a predeterminedtime (10 seconds in this example) in silicon oil heated at apredetermined high temperature (260° C. in this example). Immediatelyafter that, it is immersed for a predetermined time (20 seconds in thisexample) in silicon oil kept at a predetermined low temperature (20° C.in this example). These operations are repeated predetermined times (forexample 50 times). A test piece including a daisy pattern in whichcopper patterns repeated in a vertical direction through a connectionportion are connected in series is used and it is determined whether ornot coefficient of variation in a resistance value of a seriesresistance is 10% or less as compared with an initial value.

The solder heat resistance test is the following test. The work isimmersed for a predetermined time in a solder tank which is heated at apredetermined temperature (260° C. in this example) and becomes amelting state, and it is examined whether or not failure (peeling of thecopper layer 302 or the like) is caused. In addition, it is determinedwhether or not failure is caused based on whether or not a change in aresistance value of the daisy pattern before and after the aboveprocessing is 10% or less.

The PCT is the following test. Water is entered into a pressure vessel.A test piece is put on a cage or the like in the pressure vessel andkept in a position higher than a liquid level of the water. The water isheated at a predetermined temperature (121° C. in this example) to keepthe inner portion of the pressure vessel at a predetermined vaporpressure (2 atmospheric pressures in this example) for a predeterminedtime (24 hours in this example). It is examined whether or not avariation in resistance value is within 10% and whether or not failure(peeling of the copper layer 302 or the like) such as blistering orpeeling is caused.

The migration test is the following test. A wiring film which is madefrom a copper layer and in which a comb tooth shaped positive electrodeand a comb tooth shaped negative electrode are opposite to each other ata predetermined interval is formed on a wiring circuit forming board. Apredetermined voltage (for example DC 50 V) is applied between theelectrodes of the wiring film. Thus, it is detected from a migrationphenomenon of pattern metal whether or not a short circuit phenomenonbetween a plus pole and a minus pole is caused in a predetermined time(for example 1000 hours) or whether or not a current leakage which issupposedly caused when an insulating resistance becomes 10⁸ Ω or less bythe reduction thereof is caused.

As is apparent from FIG. 20(D), in the case where Vickers hardness is 62Hv, when a test piece in which electrical connection is provided istested, it is accepted in accordance with the migration test. However,it is rejected in accordance with the HO test, the solder heatresistance test, and the PCT. Thus, when Vickers hardness is a low valuesuch as 62 Hv, interface peeling is caused between the upper surface ofthe bump 2 a and the copper layer 202, a pressure welding portioncontact area therebetween is narrowed, a resistance is increased, and apressure welding portion between the copper bump and the copper layer isreduced. In addition, because the pressure welding state is unstable,connectivity is deteriorated and long-term reliability is reduced.

Conversely, when Vickers hardness is increased to be larger than 120 Hv,for example, when it is increased to about 155 Hv, there is no problemwith respect to the HO test, the solder heat resistance test, the PCT,and the migration test. However the bump is hard to deform at pressingand the copper layer as shown in FIG. 20(D) is bulged. Thus, when thefollowing patterning is conducted, a photosensitive resist cannot bepreferably coated and it cannot be made in contact with a mask inexposure. Accordingly, a problem such as frequent occurrence ofdefective pattern formation is caused.

In contrast to this, when Vickers hardness is 80 to 150 Hv, satisfiedtest results are obtained with respect to the HO test, the solder heatresistance test, the PCT, and the migration test. In addition, there isno defective patterning during the process and it is accepted.

Therefore, in this embodiment mode, as described above, the copper layer302 having Vickers hardness of 80 to 150 Hv is used as a metal plate 1 aand a layer having Vickers hardness of 80 to 150 Hv is used as thecopper layer 202 to be laminated.

A technique according to this embodiment mode can all be applied tomanufacturing of a wiring circuit forming board of a type in which abump is used as upper and lower wirings interconnecting means using acopper material and wirings formed by copper patterning are electricallyconnected with each other through the bump.

FIGS. 21(A) to 21(E) show a tenth embodiment mode of a multi-layerwiring board manufacturing method according to the present invention.FIGS. 21(A) to 21(D) are sectional views showing the manufacturingmethod in step order. FIG. 21(E) shows by way of a table good/poorstates of a bump forming member side and copper foil (copper layer)laminated thereon with respect to various processing contents.

(A) Copper foil 202 (corresponding to the copper foil (copper layer) 202shown in FIG. 20(B)) is prepared and soft etching processing using anammonium persulfate solution or the like is performed therefor as shownin FIG. 21(A). The prepared copper foil 202 falls under the category ofelectrolytic copper foil. However, the surface of commercially availablefoil is firstly processed by zinc plating, processed using chromate, andprocessed by silane coupling. When this is used without being processed,a hard oxide film and an insulating layer of an organic matter areformed on copper between the upper surface of a copper bump and thesurface of a copper wiring film. Accordingly, an electrical connectionproperty after lamination is insufficient.

Thus, as shown in FIG. 21(A), soft etching processing is performed.According to this processing, in order to remove an oxide and an organicmatter on the surface of copper to expose a pure copper layer, softetching bath using an aqueous solution containing mainly ammoniumpersulfate is used to obtain a pure copper surface.

Therefore, the copper foil 202 may be immediately laminated on the metalplate 1 a (see FIG. 20(B)). Note that, in order to improve contactbetween the copper foil 202 and bumps 2 a, it is preferable that thefollowing blackening processing is performed and reduction processing isfurther performed for the following reason. When the soft etchingprocessing as shown in FIG. 21(A) is performed, the surface becomes asmooth surface so that the contact between the bumps 2 a and the copperfoil 202 becomes insufficient. Thus, contact between an insulating resinand the copper layer cannot be ensured unless somewhat uneven surface isformed.

(B) Next, as shown in FIG. 21(B), blackening processing is performed.Specifically, oxidation is conducted using for example a hydrogenperoxide solution as a processing solution. Then, needle shapedcrystalline matter made of copper oxide and copper is formed on thesurface of the copper foil 202. The needle shaped crystalline matterforms unevenness on the surface of the copper foil 202.

(C) Next, as shown in FIG. 21(C), reduction processing is performed. Asolution containing mainly for example dimethylaminoborane or causticsoda is used as a reduction solution. Then, of the needle shapedcrystalline matter containing mainly the copper oxide which is producedon the surface of the copper foil 202 by the blackening processing shownin FIG. 21(B), the copper oxide is reduced. Thus, a state in which onlythe copper of the needle shaped crystalline matter is formed on thesurface of the copper foil is obtained and the surface of the copperfoil 202 becomes a state in which unevenness is produced.

(D) Immediately after that or while storing the foil so as not tooxidize the surface of copper, the copper foil 202 is laminated on themetal plate 1 a (which is the same as the metal plate 1 a shown in FIG.20(A)) as shown in FIG. 21(D).

FIG. 21(E) shows the kinds of processings performed for the copper foil202 and judgement of good/poor with respect to initial electricalconductivity of the copper foil and contact property thereof to theinsulating resin in correspondence with the above processings, in which“o” indicates good and “x” indicates poor.

In FIG. 21(E), “no processing” as a kind of processings indicates thecase where commercially available electrolytic copper foil for whichzinc plating, chromate processing, and silane coupling processing areperformed is used as it is. “The blackening processing” indicates thecase where common copper foil for which processings such as zincplating, chromate processing, and silane coupling processing areperformed as the copper foil 202 is processed by soft etching to removea layer processed, and then blackening processing is performed.Reduction processing after that is called “blackening reductionprocessing”.

As is apparent from this drawing, it is preferable that at leastblackening reduction processing is performed for the copper foil 202before lamination on the metal plate 1 a. With respect to the softetching, the electrical conductivity is good but the roughness of thesurface of copper foil obtained is insufficient. Thus, it is notpractical in view of the resulting inferior adhesive property thereof tothe resin.

Note that, it can be said that performing blackening reductionprocessing also for the upper surfaces of the bumps 2 a of the metalplate 1 a is even more preferable in reducing a contact resistance. Inaddition, it can be said that blackening reduction processing is evenmore preferable in improving the connection between the bumps 2 a andthe copper foil 202.

FIGS. 22(A) to 22(C) are sectional views showing an eleventh embodimentmode of a multi-layer wiring board manufacturing method according to thepresent invention in step order. In this embodiment, the multi-layerwiring board manufacturing method is as follows. Respective metal plates1 a and 1 b in which an insulating layer is formed in a portion betweenrespective bumps on bump forming side surfaces of copper foil in whichthe bumps are selectively formed (see FIG. 22(A)) are laminated on bothsurfaces of a wiring board 10 in which wiring films are formed on bothsurfaces of an insulating plate and the wiring films on both surfaces ofthe insulating plates are electrically connected with each other througha through hole (see FIG. 22(B)). Further, the copper foils of the metalplates 1 a and 1 b are patterned to form wiring films.

(A) As shown in FIG. 22(A), the metal plates 1 a and 1 b in which theformation of bumps 2 a by selective etching of copper foils 505 and theformation of an interlayer insulating layer 7 by lamination of aninsulating sheet are completed are prepared, and blackening reductionprocessing is performed for the surfaces of at least the bumps 2 a.

The processing can be performed as in the case of the embodiment mode asshown in FIG. 21.

Note that 505 denotes copper foils composing bases of the metal plate 1a and 1 b, which are patterned by selective etching later to becomewiring films. 2 a denotes bumps formed by selective half etching of thecopper foils 505 (half etching is an etching in which the etchingthickness is thinner than the thickness of the copper foil 505, and notnecessarily limited to a thickness of ½). In this example, the metalplate 1 a and 1 b in which no etching barrier layers (see the portionindicated by reference numeral 4 in FIG. 10(A)) are located are used.However, in this embodiment mode, the metal plate 1 a having an etchingbarrier layer 402 as shown in FIG. 20(A) may be used.

(B) Next, as shown in FIG. 22(B), the above metal plates 1 a and 1 b arepositioned on both surfaces of the wiring board 10 such that therespective bumps 2 a are matched to corresponding wiring films 110 madeof copper, which are located on both surfaces of the wiring board 10 andfor which roughness processing, preferably, blackening reductionprocessing is performed, laminated thereon, pressurized, and integrallyformed. The lamination and the integral formation prevent oxidization,and the above blackening reduction processing allows a more preferablepressure welding state between the copper wiring films 110 and thecopper bumps 2 a. Alternatively, it is preferably conducted as soon aspossible immediately after the blackening processing and subsequentreduction processing. Note that 120 denotes an insulating platecomposing a base of the wiring board 10, 130 denotes a through holewhich penetrates the insulating plate 120, and 140 denotes a throughhole wiring film which is formed on the surface of the through hole 130to provide interconnection between upper and lower wirings.

(C) After that, as shown in FIG. 22(C), the copper foils 505 of theabove metal plates 1 a and 1 b are selectively etched to form wiringfilms 15.

According to this embodiment mode, since, after oxides on the uppersurfaces of the bumps 2 a of the metal plates 1 a and 1 b are removed,and, needle shaped crystallization blackening processing for obtainingroughness and reduction processing for reducing the oxides produced bythe blackening processing are performed to improve the connection, themetal plates 1 a and 1 b can be laminated on both surfaces of the wiringboard 10, an electrical resistance between the bumps 2 a and the wiringfilms 110 can be reduced.

Also, with respect to the wiring board 10, as well as in the case of themetal plates 1 a and 1 b, it is preferable that blackening reductionprocessing is performed for the wiring films 110 which are located onboth surfaces and made of copper. Thus, a contact resistance between thebumps 2 a and the wiring films 110 can be further reduced and theconnection property can be further improved.

FIGS. 23(1) to 23(7) are sectional views showing a twelfth embodimentmode of a multi-layer wiring board manufacturing method according to thepresent invention in step order and FIGS. 23(11) to 23(15) are sectionalviews showing a modified example of the twelfth embodiment mode in steporder.

First, the twelfth embodiment mode will be described with reference toFIGS. 23(1) to 23(7). In this embodiment, in order not to deposit apolishing powder on a product, an interlayer insulating layer 7 isformed in a region in which the bumps 2 a are not formed, of a metalplate 1 a in which the bumps 2 a are formed on the surface of copperfoil 505.

In other words, the present applicant has developed as an interlayerinsulating layer forming method a method of laminating a sheetinterlayer insulating layer 7 in a bump forming surface side of themetal plate 1 a with a state in which a peeling film is overlappedtherewith so that the sheet interlayer insulating layer 7 is penetratedby the bumps 2 a. However, with respect to this method, when thelamination is conducted and then polishing is conducted for the bumpforming surface side of the metal plate 1 a to expose the surfaces ofthe bumps 2 a, there is a possibility that a polished powder is producedfrom a release film, copper, and the like and deposited onto a product.The twelfth embodiment mode is intended to eliminate such a defect.

(1) As shown in FIG. 23(1), a laminate of a release film 31, the sheetinterlayer insulating layer 7, a release film 31, and slit sheets 32consisting of for example three overlapped sheets is provided to thebump forming surface side of the metal plate 1 a in which the bumps 2 aare formed on one surface of the copper foil 505.

(2) Next, the laminate of the release film 31, the sheet interlayerinsulating layer 7, the release film 31, and the slit sheets consistingof for example three overlapped sheets 32, 32, and 32 is laminated onthe bump forming surface of the metal plate 1 a so that a state in whichthe lowermost release film 31 and the interlayer insulating layer 7 arepenetrated by the bumps 2 a is obtained. After that, for example theslit sheets consisting of for example three overlapped sheets 32 areremoved. FIG. 23(2) shows a state after the removal of the slit sheets32. In this step, respective bump holes 33 which are engaged with therespective bumps 2 a are formed in the interlayer insulating layer 7.

(3) After that, the bump forming surface of the metal plate 1 a ispolished to expose the upper portions of the respective bumps 2 a asshown in FIG. 23(3).

(4) Next, as shown in FIG. 23(4), the three-layer structure portioncomposed of the release film 31, the interlayer insulating layer 7, therelease film 31 is separated from the metal plate 1 a. It is needless tosay that the bump holes 33 which are engaged with the respective bumps 2a and penetrated thereby are formed corresponding to them in thethree-layer structure portion.

(5) Next, from the three-layer structure body composed of the releasefilm 31, the interlayer insulating layer 7, the release film 31, therelease films 31 and 31 located to both surfaces thereof are removed.Thus, as shown in FIG. 23(5), the interlayer insulating layer 7 in whichthe bump holes 33 are formed is left.

(6) Next, as shown in FIG. 23(6), the above interlayer insulating layer7 is positioned on the bump forming surface of the above metal plate 1 asuch that the respective bump holes 33 correspond to the respectivebumps 2 a, and faces them. In addition, a copper layer 202 for wiringfilm formation faces the interlayer insulating layer 7 from above.

(7) Next, as shown in FIG. 23(7), the above interlayer insulating layer7 and the above copper layer 202 are pressurized to the above metalplate 1 a and integrally formed. The multi-layer wiring boardmanufacturing method shown in FIGS. 23(1) to 23(7) corresponds to anembodiment mode of the present invention of claim 27.

According to the embodiment mode, the formation of the interlayerinsulating layer 7 to a portion in which the bumps 2 a are not formed onthe copper foil 505 of the metal plate 1 a is as follows. A layer havingthe bump holes 33 to be engaged with the respective bumps in portionscorresponding to the respective bumps 2 a is prepared as the interlayerinsulating layer 7. The interlayer insulating layer 7 is overlapped onthe above copper foil 505 by engaging the above respective bump holes 33with the bumps 2 a corresponding thereto. Further, the copper layer 202for wiring film formation on the above interlayer insulating layer isheated and pressurized. Thus, there is no possibility that a polishedpowder is produced and deposited onto a product in the case wherepolishing is conducted to expose the bumps with a state in which forexample a release film is overlapped and then lamination is conducted.

FIGS. 23(11) to 23(15) are sectional views showing a modified example ofthe embodiment mode shown in FIGS. 23(1) to 23(7) in step order.

According to this modified example, the bump holes 33 in the interlayerinsulating layer 7 are formed by performing selective etching processingfor the interlayer insulating layer 7, and only a method of forming thebump holes 33 is different from the embodiment mode in which the bumpholes 33 are formed in a manner of a transfer method and shown in FIGS.23(1) to 23(7).

Hereinafter, the modified example will be described in step order withreference to FIGS. 23(11) to 23(15).

(11) First, the interlayer insulating layer 7 is prepared and a maskform 34 is put on the surface thereof. The mask form 34 has openings 35in locations corresponding to the bumps 2 a of the metal plate 1 a. Themask form 34 can be formed by a method of preparing a plate body made ofmetal or the like, such as for example stainless steel and patterning itby photo etching (formation, exposure, and development of a photo resistfilm). FIG. 23(11) shows a state in which the mask form 34 is put on theinterlayer insulating layer 7.

(12) Next, as shown in FIG. 23(12), the above form 34 is used as amaster form and the sheet interlayer insulating layer 7 is selectivelyirradiated with laser light to form the bump holes 33 in the interlayerinsulating layer 7.

(13) After that, the mask form 34 is removed, and as shown in FIG.23(13), the interlayer insulating layer 7 in which the bump holes 33 areformed is completed.

(14) Next, as shown in FIG. 23(14), the above interlayer insulatinglayer 7 is positioned on the bump forming surface of the above metalplate 1 a such that the respective bump holes 33 correspond to therespective bumps 2 a, and faces them. In addition, the copper layer 202for wiring film formation faces the interlayer insulating layer 7 fromabove.

(15) Next, as shown in FIG. 23(15), the above interlayer insulatinglayer 7 and the above copper layer 202 are pressurized to the abovemetal plate 1 a and integrally formed. The multi-layer wiring boardmanufacturing method shown in FIGS. 23(11) to 23(15) corresponds to anembodiment mode of the present invention in claim 28.

Even in such a modified example, the same effect as the embodiment modeshown in FIGS. 23(1) to 23(7) can be obtained.

Note that the formation of the bump holes 33 into the interlayerinsulating layer 7 or the formation of the interlayer insulating layer 7having the bump holes 33 is not necessarily limited to the aboveexample. The bump holes 33 may be formed by a drill or laser. Inaddition, various variations may be taken in this respect, such asputting a roller, which has on its surface protrusions corresponding toportions in which the bump holes are to be formed, onto the interlayerinsulating layer 7 and rotating it so that the portions corresponding tothe protrusions are dropped to form the bumps 33, or forming theinterlayer insulating layer 7 having the bump holes 33 by printing.

FIGS. 24(1) to 24(5) are sectional views showing a thirteenth embodimentmode of a multi-layer wiring board manufacturing method according to thepresent invention in step order. This embodiment mode is made such thatthe height of the bump can be increased. The height of the bump of themulti-layer wiring board is for example about 100 μm in many cases.There is also a case where it is necessary to increase the height of abump 2 a. However, it is difficult to respond to this requirement by aconventional technique. This is because, in order to increase the heightof the bump, it is necessary as a matter of course to increase anetching depth at the time of selective etching for forming the bump, andthe amount of side etching increases with increasing the etching depth,which hinders formation of fine pattern. Thus, in this embodiment mode,the height of the bump is increased without hindering such fine patternformation.

Hereinafter, the thirteenth embodiment mode will be described in steporder with reference to FIGS. 24(1) to 24(5).

(1) First, as shown in FIG. 24(1), a metal plate 1 a in which the bumps2 a are formed on a copper layer 505 and an interlayer insulating layer7 is formed in a portion in which the bumps 2 a are not formed, and anextension bump forming copper plate (for example 100 μm in thickness)351 are prepared, and the metal plate 1 a is laminated on one mainsurface of the copper plate 351 by pressurizing with a state in which abump 2 a forming side surface faces the one main surface of the copperplate 351.

(2) Next, as shown in FIG. 24(2), photo resist films 371 are formed onboth main surfaces of a laminate body of the metal plate 1 a and thecopper plate 351. The photo resist films 371 are used as etching masksfor forming extension bumps (381) from the copper plate 351. Note thatthe extension bumps (381) are formed so as to position them in locationscorresponding to the respective bumps 2 a of the above metal board 1 a.

(3) Next, as shown in FIG. 24(3), the photo resist films 371 arepatterned by exposure and development, the copper plate 351 isselectively etched using the patterned photo resist films 371 as masksto form the extension bumps 381 whose bottoms are in contact with thetop portions of the respective bumps 2 a of the metal plate 1 a.

(4) Next, as shown in FIG. 24(4), an interlayer insulating layer 391 forinsulating between the respective adjacent extension bumps 381 andlayers is formed in a portion in which the extension bumps 381 from thecopper plate 351 are not formed. The interlayer insulating layer 391 canbe formed by the same method as for example a method of forming theinterlayer insulating layer 7 which is previously described and shown inFIG. 23 or may be formed by another method.

(5) After that, as shown in FIG. 24(5), a copper layer 401 for wiringformation is laminated on the surface of the interlayer insulating layer391 and the surfaces of the extension bumps 381 by pressurizing.

According to such a method, the practical height of the bump becomes thesum of the height of the bump 2 a and the height of the extension bump381 and thus becomes large. Therefore, the bumps that are larger inheight than a conventional ones can be formed.

Note that a series of steps in which the copper layer 351 is laminated,selective etching is conducted for the copper layer 351 to form theextension bumps 381, and the interlayer insulating layer 391 is formedare repeated plural times. Thus, the amount of extension of the bumpheight by the extension bumps 381 can be also increased stepwise.

FIG. 25 is a sectional view showing a fourteenth embodiment mode of amulti-layer wiring board manufacturing method according to the presentinvention. In this embodiment mode, before another member (for example,copper foil 202 or a wiring board 10) is laminated, a metal plate 1 a inwhich the formation of bumps by selective etching of copper foil and theformation of an insulating layer 7 by lamination of insulating sheetsare completed is passed between rollers 31 and 31 a, and processing forpolishing the surfaces of the bumps is conducted therefor.

The roller 31 is a press roller, the roller 31 a is a polishing rollermade of for example ceramics, and 33 denotes a carrying conveyor. Themetal plate 1 a is placed on the carrying conveyor 33 such that a bumpforming side surface is in contact with the carrying conveyor 33, andpassed between the rollers 31 and 31 a to conduct polishing.

Thus, after that, it is confirmed that a contact resistance between thebump 2 a obtained by laminating the metal plate 1 a and another member(for example, the copper foil 202 or the wiring board 10) and the copperfoil 202 or wiring films 110 on both surfaces of the wiring board 10 canbe reduced and the connection therebetween can be improved.

Then, it is also confirmed that the reason why the contact resistancecan be reduced and the connection can be improved is that contaminationof the surfaces of the bumps 2 a by a resin and the like is removed.

In other words, when an insulating sheet is laminated on the metal plate1 a in which the formation of the bumps 2 a is completed to form aninterlayer insulating layer 7, a portion of a resin composing theinsulating layer 7 and another foreign matter are deposited onto thebump surfaces so that the bump surface is contaminated. When thelamination is conducted without removing the contamination, the contactresistance between the bump and another member (for example, the copperfoil 202 or the wiring board 10) slightly increases due to thecontamination and percentage defective becomes higher.

Therefore, as shown in FIG. 25, when polishing processing is performedsuch that the metal plate 1 a in which the formations of the bumps andthe interlayer insulating layer are completed is passed between therollers 31 and 31 a, a resin on the upper surfaces of the bumps or aforeign matter by glass cloth and the like is removed thereby.Accordingly, the contact resistance between the bump 2 a and the copperfoil 202 or the wiring films 110 on both surfaces of the wiring board 10can be reduced and the connection therebetween can be improved.

INDUSTRIAL APPLICABILITY

In order to obtain a multi-layer wiring board with high integration,instead of using a conventional technique in which holes are formed inthe insulating board composing a base, the metal plating film forinterconnecting upper and lower wirings is formed on the innerperipheral surface thereof, and the holes are buried, interconnectionbetween upper and lower wirings is provided by using minute bumps suchthat wiring boards can be laminated in succession at high integration.In addition, in order to reduce an electrical resistance value between ametal surface on which the bumps are formed and a metal surface which isconnected therewith, Vickers hardness is set to 80 to 150 Hv. Further,both metal surfaces are mechanically polished to keep electricalconnection between those contact surfaces. Thus, a problem such ascontact failure between them is also solved and stability is realized inthe multi-layering of the wiring boards. Accordingly, miniaturization ofthe wiring board for an electronic device can be anticipated.

1. A method of manufacturing a multi-layer wiring board, characterizedby comprising at least a lamination step of preparing a plurality ofmulti-layer metal plates in each of which a wiring film forming metallayer or a wiring film is formed on a bump forming metal layer throughan etching stop layer, patterning a bump forming metal layer of a firstmulti-layer metal plate to form a bump, forming an insulating layer on asurface for forming the bump so as to expose only a top portion of thebump from the insulating layer, then, laminating a second multi-layermetal plate on the bump of the first multi-layer metal plate in a statewhere a wiring layer forming surface of the second multi-layer platefaces the first multi-layer plate, then, forming a bump on a bumpforming surface of the second multi-layer metal plate and forming aninsulating layer thereon so as to expose only a top portion of the bumpfrom the insulating layer, and then, laminating a third multi-layermetal plate by connecting a wiring film of the third multi-layer metalplate with the bump of the second multi-layer metal plate.
 2. A methodof manufacturing a multi-layer wiring board according to claim 1,characterized in that after all the laminations are completed, selectiveetching is conducted for a bump forming metal layer of the lastlaminated multi-layer metal plate to form a bump, an insulating layer isformed on the bump forming surface of the last multi-layer metal plateso as to expose only a top portion of the bump from the insulatinglayer, then a wiring film forming metal thin plate is laminated on theinsulating layer in a state that it is connected with the bump, and awiring film is formed by patterning the wiring film forming metal thinplate or by patterning the wiring film forming metal thin plate and awiring film forming metal layer of the one multi-layer metal plate.
 3. Amethod of manufacturing a multi-layer wiring board, characterized bycomprising at least a lamination step of: forming a wiring film on abump forming metal layer through an etching stop layer; patterning thebump forming metal layer and the etching stop layer to form a bump;preparing a plurality of multi-layer metal plates in each of which aninsulating layer is formed on a bump forming surface thereof so as toexpose only a top portion of the bump from the insulating layer; of themulti-layer metal plates, connecting the bump of a second multi-layermetal plate with the wiring film of another multi-layer metal plate tolaminate the two multi-layer metal plates; and connecting the bump ofanother multi-layer metal plate with the wiring film of a thirdmulti-layer metal plate to further laminate a multi-layer metal plate onthe multi-layer metal plate laminate body.
 4. A method of manufacturinga multi-layer wiring board according to claim 3, characterized in thatafter all the laminations are completed, a wiring film forming metalthin plate is laminated on the insulating layer of the last laminatedmulti-layer metal plate in a state where it is connected with the bump,and a wiring film is formed by patterning the wiring film forming metalthin plate or by patterning the wiring film forming metal thin plate anda wiring film forming metal layer of the one multi-layer metal plate. 5.A method of manufacturing a multi-layer wiring board, characterized bycomprising at least a lamination step of preparing a multi-layer metalplate in which a wiring film is formed on a bump forming metal layerthrough an etching stop layer, forming a bump forming metal layer on theentirety of a surface of the multi-layer metal plate on which the wiringfilm is formed, through at least the etching stop layer, patterning thebump forming metal layer in which the bump forming metal layer islaminated through the etching stop layer, and the etching stop layer toform a bump, forming an insulating layer on a surface on which the bumpis formed so as to expose only a top portion of the bump from theinsulating layer, then, forming a wiring film or a wiring board having awiring film, on a surface where the bump protrudes, patterning a bumpforming metal layer, which is formed on the entirety of a surface of themulti-layer metal plate on which the wiring film is formed through atleast an etching stop layer, and the etching stop layer, to form a bump,forming an insulating layer on a surface for forming the bump so as toexpose only a top portion of the bump from the insulating layer, andthen, forming a wiring film or a wiring board having a wiring film, on asurface where the bump protrudes.
 6. A method of manufacturing amulti-layer wiring board according to claim 1, 2, 3, 4, or 5,characterized in that the wiring film of the multi-layer metal plate inwhich the wiring film is formed on the bump forming metal layer throughthe etching stop layer is formed by using as a base a bump forming metallayer on which a wiring film forming metal layer is formed through theetching stop layer and patterning the wiring film forming metal layer.7. A method of manufacturing a multi-layer wiring board according toclaim 1, 2, 3, 4, or 5, characterized in that the wiring film of themulti-layer metal plate in which the wiring film is formed on the bumpforming metal layer through the etching stop layer is formed by using asa base a bump forming metal layer on which the etching stop layer isformed and selectively conducting wiring forming metal plating for ananti-bump forming metal layer side surface of the etching stop layer. 8.A method of manufacturing a multi-layer wiring board, characterized bycomprising: preparing a plural kinds of basic wiring boards with amulti-layer wiring structure in each of which a wiring film is formed onat least one surface of a multi-layer metal plate, a wiring film or awiring film forming metal plate is formed on the other surface,interlayer insulation is provided by an insulating film, and interlayerconnection is provided by a bump made of metal; and laminating aplurality of basic wiring boards including different kinds of boardsfrom among the plural kinds of basic wiring boards.
 9. A method ofmanufacturing a multi-layer wiring board according to claim 8,characterized in that boards in each of which a wiring film is formed onone surface and a wiring film forming metal layer is formed on the othersurface are selected as the uppermost board and the lowermost board,from among the plurality of basic wiring boards to be laminated, theplurality of basic wiring boards are laminated such that respectivewiring film forming metal layers of the uppermost board and thelowermost board of the plurality of the basic wiring boards to belaminated face toward the outside, and then, the wiring film formingmetal layers of the uppermost and lowermost basic wiring boards aresimultaneously patterned to form wiring films of the uppermost layer andthe lowermost layer.
 10. A method of manufacturing a multi-layer wiringboard, characterized by comprising: a step of forming a reinforcinglayer on one surface of a multi-layer metal plate for forming a wiringboard; a step of laminating another member on a surface of themulti-layer metal plate which is opposite to the reinforcing layer; andthen, a step of at least peeling the reinforcing layer.
 11. A method ofmanufacturing a multi-layer wiring board, characterized by comprising: astep of forming a reinforcing layer on one surface of a multi-layermetal plate for forming a wiring board; a step of conducting patterningand lamination of another member with respect to a surface of themulti-layer metal plate which is opposite to the reinforcing layer; andthen, a step of at least peeling the reinforcing layer.
 12. A method ofmanufacturing a multi-layer wiring board according to claim 10 or 11,characterized in that the reinforcing layer is made from a heatresistant film to which a peeling layer is provided.
 13. A method ofmanufacturing a multi-layer wiring board according to claim 12,characterized in that the heat resistant film is made of a polyphenylenesulfide resin, a polyetherimide resin, a liquid crystal polymer film, ora polyether etherketone resin.
 14. A metal board for forming a wiringboard, which has a three-layer structure and in which a metal bump forinterlayer connection is formed on one surface, characterized in that apeeling layer and a heat resistant film are laminated in advance on asurface which is opposite to the one surface and which later becomes awiring film.
 15. A method of manufacturing a multi-layer wiring board inwhich, on one main surface of a multi-layer metal plate in which aplurality of metal bumps each having a longitudinal cross sectionalshape such as a cone shape or a trapezoid shape are arranged inpredetermined positions on the one main surface, at least an insulatinglayer which is made of a synthetic resin and composed of an interlayerinsulating film having a thickness smaller than the height of the bumpsis covered so as to follow the shapes of the respective metal bumps, andthe one main surface of the metal plate is polished so that a portion ofthe insulating layer which covers the bumps is removed to expose uppersurfaces of the bumps, characterized in that the polishing is conductedby placing the metal plate such that the one main surface faces upward,moving a cutter having a large width relatively to the metal plate inparallel to the main surface to thereby cut the top surfaces of therespective bumps with the cutter such that they lie on the same plane asthe surface of the insulating layer.
 16. A method of manufacturing amulti-layer wiring board according to claim 15, characterized in thatthe cutter having a large width is moved in a direction parallel to themetal plate while applying low frequency vibration or ultrasonicvibration in a direction perpendicular to the main surface.
 17. Apolishing machine for a multi-layer wiring board, characterized bycomprising: a metal plate holding means for holding a metal plate, inwhich a plurality of bumps each having a longitudinal cross sectionalshape such as a cone shape or a trapezoid shape are arranged inpredetermined positions of its one main surface and at least aninsulating layer which is made of a synthetic resin and composed of aninterlayer insulating film having a thickness smaller than the thicknessof the bumps is covered on the one main surface so as to follow theshapes of the respective bumps, in a state that the one main surfacefaces upward; a cutter holding means for holding a cutter having a largewidth above the metal plate; a height adjustment mechanism for adjustingthe height of the cutter holding means relative to the metal plate; anda cutter parallel moving mechanism for relatively moving the cutterholding means in parallel to the surface of the metal plate.
 18. Amethod of manufacturing a multi-layer wiring board in which, on one mainsurface of a metal plate in which a plurality of bumps each having alongitudinal cross sectional shape such as a cone shape or a trapezoidshape are arranged in predetermined positions on the one main surfaces,at least an insulating layer which is made of a synthetic resin andcomposed of an interlayer insulating film having a thickness smallerthan the thickness of the bumps is covered so as to follow the shapes ofthe respective metal bumps, and in which the one surface of the metalplate is polished so that a portion of the insulating layer which coversthe bumps is removed so as to expose upper surfaces of the bumps,characterized in that the polishing is conducted by passing the metalplate for pressing between a polishing roller in which a polishingmaterial is sintered on its peripheral surface and a backup roller suchthat the one main surface comes into contact with the polishing roller,and cutting the top surfaces of the respective bumps with the polishingroller such that they lie on the same plane as the surface of theinsulating layer.
 19. A method of manufacturing a multi-layer wiringboard according to claim 18, characterized in that polishing conductedby passing a multi-layer metal plate between a polishing roller and abackup roller is conducted plural times such that the degree of finishis gradually increased.
 20. A polishing machine for a multi-layer wiringboard, characterized by comprising: a polishing roller in which apolishing material is sintered on its peripheral surface; a rollerrotating means for rotating the polishing roller; a backup roller; ameans for pressing the backup roller onto the polishing roller; and acarrying means for carrying a metal plate between the polishing rollerand the backup roller.
 21. A polishing machine for a multi-layer wiringboard which comprises a plurality of metal plate polishing portions eachincluding at least: a polishing roller in which a polishing material issintered on its peripheral surface; a roller rotating means for rotatingthe polishing roller; a backup roller; a pressing means for pressing thebackup roller onto the polishing roller; and a carrying means forcarrying a metal plate between the polishing roller and the backuproller, characterized in that the roughnesses of the polishing materialsof the polishing rollers in the respective metal plate polishingportions are made different from each other.
 22. A method ofmanufacturing a multi-layer wiring board in which, on one main surfaceof a multi-layer metal plate in which a plurality of metal bumps eachhaving a longitudinal cross sectional shape such as a cone shape or atrapezoid shape are arranged in predetermined positions of the one mainsurface, at least an insulating layer which is made of a synthetic resinand composed of an interlayer insulating film having a thickness smallerthan the thickness of the bumps is covered so as to follow the shapes ofthe respective metal bumps, and in which the one main surface of themetal plate is polished so that a portion of the insulating layer whichcovers the bumps is removed to expose upper surfaces of the bumps,characterized in that the polishing is conducted by rotating a cutterroller in which cutters each having a large width are provided on itsperipheral surface such that cutting edges thereof protrude toward arotational direction side and are rotated, and moving the cutter rollerin parallel to the surface of the metal plate while cutting the topsurfaces of the respective bumps with the wide cutters of the rotatedcutter roller such that they lie on the same plane as the surface of theinsulating layer.
 23. A polishing machine for a multi-layer wiringboard, characterized by comprising: a metal plate holding means forholding a metal plate, in which a plurality of bumps each having alongitudinal cross sectional shape such as a cone shape or a trapezoidshape are arranged in predetermined positions of its one main surfaceand at least an insulating layer that is made of a synthetic resin andcomposed of an interlayer insulating film having a thickness smallerthan the thickness of the bumps is covered on the one main surface so asto follow the shapes of the respective metal bumps, in a state where theone main surface faces upward; a cutter roller holding means forrotatably holding, above the metal plate, a cutter roller in whichcutters each having a large width are provided on its peripheral surfacesuch that cutting edges thereof protrude toward a rotation directionside; a rotation drive means for rotating the cutter roller; a heightadjustment mechanism for adjusting the height of the cutter rollerholding means relative to the multi-layer metal plate; and a cutterroller parallel moving mechanism for relatively moving the cutter rollerholding means in parallel to the surface of the metal plate.
 24. Amulti-layer wiring film forming board in which, on an interlayerinsulating layer and a top surface of a bump of one wiring film formingboard in which the bump for interconnecting upper and lower wirings andmade of metal is integrally formed on a metal layer and the interlayerinsulating film is formed in a portion in which the bump is not formedon the metal layer, a metal layer or another wiring film forming boardis laminated, characterized in that Vickers hardnesses of the metallayer and the bump are set to 80 to 150 Hv.
 25. A method ofmanufacturing a multi-layer wiring board in which, on an interlayerinsulating layer and a top surface of a bump of one wiring film formingboard in which the bump for interconnecting upper and lower wirings andmade of metal is integrally formed on a metal layer and the interlayerinsulating film is formed in a portion in which the bump is not formedon the metal layer, a metal plate or another wiring film forming boardis laminated to electrically connect the bump with the metal plate or awiring film of another wiring film forming board which is made of metalto thereby manufacture a multi-layer wiring board, characterized in thatbefore the lamination, blackening reduction processing is performed forone or both of: a top surface of a bump of the one wiring film formingboard; a surface of the metal plate or the wiring film of another wiringfilm forming board which is made of metal.
 26. A method of manufacturinga multi-layer wiring board in which, on an interlayer insulating layerand a top surface of a bump of one wiring film forming board in whichthe bump for interconnecting upper and lower wirings and made of metalis integrally formed on a metal layer and the interlayer insulating filmis formed in a portion in which the bump is not formed on the metallayer, a metal layer or another wiring film forming board is laminated,characterized in that in the one wiring circuit forming board in whichupper and lower wirings interconnecting bumps made of metal areintegrally formed on a metal layer, the formation of the interlayerinsulating layer in a portion of the metal layer in which the bumps arenot formed is performed by: preparing an interlayer insulating layer inwhich bump holes for engaging with the respective bumps are formed in aportion corresponding to the upper and lower wirings interconnectingbumps; overlapping the interlayer insulating film on the metal layer ina state that the respective bump holes thereof are engaged with thecorresponding respective upper and lower wirings interconnecting bumps;and pressurizing a wiring forming metal layer onto the interlayerinsulating film.
 27. A method of manufacturing a multi-layer wiringboard according to claim 26, characterized in that the formation of thebump holes in the interlayer insulating layer is performed by bringingthe interlayer insulating layer into contact with a bump forming surfaceof a wiring film forming board in which upper and lower wiringsinterconnecting bumps are formed so that the interlayer insulating layeris penetrated by the upper and lower wirings interconnecting bumps. 28.A method of manufacturing a multi-layer wiring board according to claim26, characterized in that the formation of the bump holes in theinterlayer insulating layer is performed by selectively penetrating theinterlayer insulating layer by laser light irradiation using as a mask amask body having substantially the same pattern as the upper and lowerwirings interconnecting bumps of the wiring film forming board.
 29. Amulti-layer wiring board characterized in that: on an interlayerinsulating layer and upper surfaces of bumps of a board in which theupper and lower wirings interconnecting bumps made of metal areintegrally formed on a metal layer and the interlayer insulating layeris formed in a portion in which the bumps are not formed on the metallayer, a metal plate in which extension bumps are formed in positionscorresponding to the respective upper and lower wirings interconnectingbumps is laminated such that the respective bumps are electricallyconnected with the respective upper and lower wirings interconnectingbumps corresponding thereto; and an interlayer insulating layer isformed in a portion of the metal plate in which the extension bumps arenot formed.
 30. A method of manufacturing a multi-layer wiring board,characterized by comprising: a step of laminating a metal plate on aninterlayer insulating layer and upper surfaces of upper and lowerwirings interconnecting bumps of a board in which the upper and lowerwirings interconnecting bumps made of metal are integrally formed on ametal layer and the interlayer insulating layer is formed in a portionin which the bumps are not formed on the metal layer; a step ofselectively etching the metal plate to form extension bumps connectedwith the respective upper and lower wirings interconnecting bumps inpositions corresponding thereto; and a step of forming an interlayerinsulating layer in a portion of the metal plate in which the extensionbumps are not formed.
 31. A method of manufacturing a multi layer wiringboard in which a metal layer or another wiring circuit forming board islaminated on an interlayer insulating layer and upper surfaces of bumpsof a wiring film forming board in which the upper and lower wiringsinterconnecting bumps made of metal are integrally formed on a metallayer and the interlayer insulating layer is formed in a portion inwhich the bumps are not formed on the metal layer, characterized bycomprising polishing the wiring film forming board, in which theinterlayer insulating layer is formed by laminating an insulating layercomposing the interlayer insulating layer on a surface of the metallayer on which the upper and lower wirings interconnecting bumps areformed, by passing it between the polishing roller and the backup rollerbefore the metal layer or another wiring circuit forming board islaminated.